Thread (37 messages) 37 messages, 6 authors, 2019-03-07

Re: [PATCHv6 06/10] node: Add memory-side caching attributes

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From: Brice Goglin <hidden>
Date: 2019-02-22 10:22:18
Also in: linux-acpi, linux-mm, lkml

Le 14/02/2019 à 18:10, Keith Busch a écrit :
quoted hunk ↗ jump to hunk
System memory may have caches to help improve access speed to frequently
requested address ranges. While the system provided cache is transparent
to the software accessing these memory ranges, applications can optimize
their own access based on cache attributes.

Provide a new API for the kernel to register these memory-side caches
under the memory node that provides it.

The new sysfs representation is modeled from the existing cpu cacheinfo
attributes, as seen from /sys/devices/system/cpu/<cpu>/cache/.  Unlike CPU
cacheinfo though, the node cache level is reported from the view of the
memory. A higher level number is nearer to the CPU, while lower levels
are closer to the last level memory.

The exported attributes are the cache size, the line size, associativity,
and write back policy, and add the attributes for the system memory
caches to sysfs stable documentation.

Signed-off-by: Keith Busch <redacted>
---
 Documentation/ABI/stable/sysfs-devices-node |  35 +++++++
 drivers/base/node.c                         | 151 ++++++++++++++++++++++++++++
 include/linux/node.h                        |  34 +++++++
 3 files changed, 220 insertions(+)
diff --git a/Documentation/ABI/stable/sysfs-devices-node b/Documentation/ABI/stable/sysfs-devices-node
index cd64b62152ba..5c88cb9ca14e 100644
--- a/Documentation/ABI/stable/sysfs-devices-node
+++ b/Documentation/ABI/stable/sysfs-devices-node
@@ -143,3 +143,38 @@ Contact:	Keith Busch <keith.busch@intel.com>
 Description:
 		This node's write latency in nanoseconds when access
 		from nodes found in this class's linked initiators.
+
+What:		/sys/devices/system/node/nodeX/memory_side_cache/indexY/
+Date:		December 2018
+Contact:	Keith Busch <keith.busch@intel.com>
+Description:
+		The directory containing attributes for the memory-side cache
+		level 'Y'.
+
+		The caches associativity: 0 for direct mapped, non-zero if
+What:		/sys/devices/system/node/nodeX/memory_side_cache/indexY/associativity
+Date:		December 2018
+Contact:	Keith Busch <keith.busch@intel.com>
+Description:
+		The caches associativity: 0 for direct mapped, non-zero if
+		indexed.

Should we rename "associativity" into "indexing" or something else?

When I see "associativity" that contains 0, I tend to interpret this as
the associativity value itself, which would mean fully-associative here
(as in CPU-side cache "ways_of_associativity" attribute), while actually
0 means direct-mapped (ie 1-associative) with yout semantics.

Brice
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