On 08/30/2018 07:38 AM, Yu-cheng Yu wrote:
quoted hunk ↗ jump to hunk
+ * Some processors can start a write, but ending up seeing
+ * a read-only PTE by the time they get to the Dirty bit.
+ * In this case, they will set the Dirty bit, leaving a
+ * read-only, Dirty PTE which looks like a Shadow Stack PTE.
+ *
+ * However, this behavior has been improved and will not occur
+ * on processors supporting Shadow Stacks. Without this
+ * guarantee, a transition to a non-present PTE and flush the
+ * TLB would be needed.
Did we publicly document this behavior anywhere? I can't seem to find it.