-----Original Message-----
From: Phil Yang <redacted>
Sent: Thursday, July 2, 2020 12:27 AM
To: Carrillo, Erik G <redacted>; dev@dpdk.org
Cc: jerinj@marvell.com; Honnappa.Nagarahalli@arm.com;
drc@linux.vnet.ibm.com; Ruifeng.Wang@arm.com;
Dharmik.Thakkar@arm.com; nd@arm.com
Subject: [PATCH v2 4/4] eventdev: relax smp barriers with c11 atomics
The implementation-specific opaque data is shared between arm and cancel
operations. The state flag acts as a guard variable to make sure the update of
opaque data is synchronized. This patch uses c11 atomics with explicit one
way memory barrier instead of full barriers rte_smp_w/rmb() to synchronize
the opaque data between timer arm and cancel threads.
Signed-off-by: Phil Yang <redacted>
Reviewed-by: Dharmik Thakkar <redacted>
Reviewed-by: Ruifeng Wang <redacted>
Acked-by: Erik Gabriel Carrillo <redacted>