Thread (45 messages) 45 messages, 7 authors, 2020-07-08

Re: [dpdk-dev] [PATCH 2/3] eventdev: use c11 atomics for lcore timer armed flag

From: Carrillo, Erik G <hidden>
Date: 2020-06-23 21:31:48

-----Original Message-----
From: Stephen Hemminger <stephen@networkplumber.org>
Sent: Tuesday, June 23, 2020 4:20 PM
To: Phil Yang <redacted>
Cc: dev@dpdk.org; Carrillo, Erik G <redacted>;
drc@linux.vnet.ibm.com; honnappa.nagarahalli@arm.com;
ruifeng.wang@arm.com; dharmik.thakkar@arm.com; nd@arm.com
Subject: Re: [dpdk-dev] [PATCH 2/3] eventdev: use c11 atomics for lcore
timer armed flag

On Fri, 12 Jun 2020 19:19:57 +0800
Phil Yang [off-list ref] wrote:
quoted
 	/* Track which cores have actually armed a timer */
 	struct {
-		rte_atomic16_t v;
+		int16_t v;
 	} __rte_cache_aligned in_use[RTE_MAX_LCORE];
Do you really need this to be cache aligned (ie one per line)?
I believe I did this originally to keep a cache line from bouncing when two different cores are arming timers, so it's not strictly necessary.
Why have a signed value for a reference count? Shouldn't it be unsigned?
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