Thread (47 messages) 47 messages, 5 authors, 2019-07-09

[dpdk-dev] [PATCH v5 3/4] net/ipn3ke: clear statistics when init and start dev

From: Andy Pei <hidden>
Date: 2019-07-01 10:57:38
Subsystem: networking drivers, the rest · Maintainers: Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds

clear line side and NIC side statistics registers when HW init and
uinit, and when dev start.

Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver")
Cc: rosen.xu@intel.com

Signed-off-by: Andy Pei <redacted>
---
 drivers/net/ipn3ke/ipn3ke_ethdev.c      | 59 ++++++++++++++++++++++++++++-----
 drivers/net/ipn3ke/ipn3ke_representor.c | 27 ++++++++++++---
 2 files changed, 74 insertions(+), 12 deletions(-)
diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c b/drivers/net/ipn3ke/ipn3ke_ethdev.c
index 8d3084d..27ebfb5 100644
--- a/drivers/net/ipn3ke/ipn3ke_ethdev.c
+++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c
@@ -244,11 +244,33 @@
 			/* Enable the RX path */
 			ipn3ke_xmac_rx_enable(hw, i, 1);
 
-			/* Clear all TX statistics counters */
-			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
 
-			/* Clear all RX statistics counters */
-			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);
+
+			/* Clear line RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);
+		}
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		/* Enable inter connect channel */
+		for (i = 0; i < hw->port_num; i++) {
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);
+
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);
 		}
 	}
 
@@ -291,11 +313,32 @@
 			/* Disable the RX path */
 			ipn3ke_xmac_rx_disable(hw, i, 1);
 
-			/* Clear all TX statistics counters */
-			ipn3ke_xmac_tx_clr_stcs(hw, i, 1);
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_10G_stcs(hw, i, 0);
+
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_10G_stcs(hw, i, 0);
+		}
+	} else if (hw->retimer.mac_type ==
+			IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		for (i = 0; i < hw->port_num; i++) {
+			/* Clear NIC side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear NIC side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 1);
+
+			/* Clear line side TX statistics counters */
+			ipn3ke_xmac_tx_clr_25G_stcs(hw, i, 0);
 
-			/* Clear all RX statistics counters */
-			ipn3ke_xmac_rx_clr_stcs(hw, i, 1);
+			/* Clear line side RX statistics counters */
+			ipn3ke_xmac_rx_clr_25G_stcs(hw, i, 0);
 		}
 	}
 }
diff --git a/drivers/net/ipn3ke/ipn3ke_representor.c b/drivers/net/ipn3ke/ipn3ke_representor.c
index 01ad92e..4456d9d 100644
--- a/drivers/net/ipn3ke/ipn3ke_representor.c
+++ b/drivers/net/ipn3ke/ipn3ke_representor.c
@@ -159,11 +159,30 @@
 		/* Enable the RX path */
 		ipn3ke_xmac_rx_enable(hw, rpst->port_id, 0);
 
-		/* Clear all TX statistics counters */
-		ipn3ke_xmac_tx_clr_stcs(hw, rpst->port_id, 0);
+		/* Clear line side TX statistics counters */
+		ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 0);
 
-		/* Clear all RX statistics counters */
-		ipn3ke_xmac_rx_clr_stcs(hw, rpst->port_id, 0);
+		/* Clear line side RX statistics counters */
+		ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear NIC side TX statistics counters */
+		ipn3ke_xmac_tx_clr_10G_stcs(hw, rpst->port_id, 1);
+
+		/* Clear NIC side RX statistics counters */
+		ipn3ke_xmac_rx_clr_10G_stcs(hw, rpst->port_id, 1);
+	} else if (hw->retimer.mac_type ==
+				IFPGA_RAWDEV_RETIMER_MAC_TYPE_25GE_25GAUI) {
+		/* Clear line side TX statistics counters */
+		ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear line side RX statistics counters */
+		ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 0);
+
+		/* Clear NIC side TX statistics counters */
+		ipn3ke_xmac_tx_clr_25G_stcs(hw, rpst->port_id, 1);
+
+		/* Clear NIC side RX statistics counters */
+		ipn3ke_xmac_rx_clr_25G_stcs(hw, rpst->port_id, 1);
 	}
 
 	ipn3ke_rpst_link_update(dev, 0);
-- 
1.8.3.1
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