[PATCH v1 5/5] arm64: dts: cix: Add Sky1 DMA-350 nodes
From: Jelly Jia <hidden>
Date: 2026-09-07 03:34:15
Also in:
linux-arm-kernel, linux-devicetree, lkml
Subsystem:
arm/cix soc support, the rest · Maintainers:
Gary Yang, Fugang Duan, Linus Torvalds
Add CIX Sky1 DMA-350 integration nodes with child Arm DMA-350 controllers. The nodes describe the FCH and AUDSS DMA instances. Signed-off-by: Jelly Jia <redacted> --- arch/arm64/boot/dts/cix/sky1.dtsi | 61 +++++++++++++++++++++++++------ 1 file changed, 49 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/cix/sky1.dtsi b/arch/arm64/boot/dts/cix/sky1.dtsi
index 0a820f45feb9..7a5e463dc7c5 100644
--- a/arch/arm64/boot/dts/cix/sky1.dtsi
+++ b/arch/arm64/boot/dts/cix/sky1.dtsi@@ -518,18 +518,29 @@ iomuxc: pinctrl@4170000 { reg = <0x0 0x04170000 0x0 0x1000>; }; - fch_dmac: dma-controller@4190000 { - compatible = "arm,dma-350"; - reg = <0x0 0x4190000 0x0 0x10000>; - interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, - <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, - <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, - <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, - <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, - <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, - <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, - <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>; - #dma-cells = <1>; + cix_fch_dmac: dma@4190000 { + compatible = "cix,sky1-dma350"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0x4190000 0x0 0x10000>; + dma-ranges = <0x0 0x040a0000 0x0 0x040b0000 0x0 0x00040000>, + <0x0 0x80000000 0x0 0x80000000 0x8 0x00000000>, + <0x80 0x00000000 0x80 0x00000000 0x80 0x00000000>; + clocks = <&scmi_clk CLK_TREE_FCH_DMA_ACLK>; + + fch_dmac: dma-controller@0 { + compatible = "arm,dma-350"; + reg = <0x0 0x0 0x0 0x10000>; + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH 0>; + #dma-cells = <1>; + }; }; mbox_ap2se: mailbox@5060000 {
@@ -576,6 +587,32 @@ mbox_pm2ap: mailbox@65a0080 { cix,mbox-dir = "rx"; }; + cix_audss_dmac: dma@7010000 { + compatible = "cix,sky1-dma350"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0x07010000 0x0 0x10000>; + dma-ranges = <0x0 0x20000000 0x0 0x07010000 0x0 0x00100000>, + <0x0 0x30000000 0x0 0xc0000000 0x0 0x20000000>; + clocks = <&audss_cru CLK_DMAC_AXI>; + resets = <&audss_cru AUDSS_DMAC_SW_RST>; + cix,irq-router = <&audss_cru>; + + audss_dmac: dma-controller@0 { + compatible = "arm,dma-350"; + reg = <0x0 0x0 0x0 0x10000>; + interrupts = <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH 0>, + <GIC_SPI 230 IRQ_TYPE_LEVEL_HIGH 0>; + #dma-cells = <1>; + }; + }; + audss_cru: clock-controller@7110000 { compatible = "cix,sky1-audss-cru"; reg = <0x0 0x07110000 0x0 0x10000>;
--
2.54.0