Thread (184 messages) 184 messages, 4 authors, 2015-01-29
STALE4180d

[PATCH 3.12 037/176] serial: samsung: wait for transfer completion before clock disable

From: Jiri Slaby <hidden>
Date: 2015-01-29 09:03:24
Also in: lkml
Subsystem: arm/samsung s3c, s5p and exynos arm architectures, the rest, tty layer and serial drivers · Maintainers: Krzysztof Kozlowski, Peter Griffin, Linus Torvalds, Greg Kroah-Hartman, Jiri Slaby

From: Robert Baldyga <redacted>

3.12-stable review patch.  If anyone has any objections, please let me know.

===============

commit 1ff383a4c3eda8893ec61b02831826e1b1f46b41 upstream.

This patch adds waiting until transmit buffer and shifter will be empty
before clock disabling.

Without this fix it's possible to have clock disabled while data was
not transmited yet, which causes unproper state of TX line and problems
in following data transfers.

Signed-off-by: Robert Baldyga <redacted>
Signed-off-by: Jiri Slaby <redacted>
---
 drivers/tty/serial/samsung.c | 4 ++++
 1 file changed, 4 insertions(+)
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index f3dfa19a1cb8..6b0adfbfacaf 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -537,11 +537,15 @@ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
 			      unsigned int old)
 {
 	struct s3c24xx_uart_port *ourport = to_ourport(port);
+	int timeout = 10000;
 
 	ourport->pm_level = level;
 
 	switch (level) {
 	case 3:
+		while (--timeout && !s3c24xx_serial_txempty_nofifo(port))
+			udelay(100);
+
 		if (!IS_ERR(ourport->baudclk))
 			clk_disable_unprepare(ourport->baudclk);
 
-- 
2.2.2
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