Re: [PATCH net-next 0/5] net: mdio: add timestamped MDIO writes for PHY gettimex64

On 12.10.2026 15:18, Andrew Lunn wrote:

[...]

quoted

Pi 4 and CM4 (the one with the PTP PHY) have no clock-frequency, so
the driver keeps the firmware's divider 9, and 200 MHz / 20 is the
10 MHz James mentions.

For CM4, i think the PHY is on the board? Does the MDIO bus get
exported via a connector? If it is a closed system, then running the
bus faster by default is O.K, since it is impossible to connect a
device which is only standards compliant. But if the bus does get
connected to the carrier board, it would be better to stick to 2.5MHz.

Yes, everything is on the same board and (unfortunately for some of my use cases)
no connector / possibility to use MDIO without the default PHY.

Regards
Nicolai