[PATCH v3 1/6] bus: mhi: host: Add support to read MHI capabilities
From: Krishna Chaitanya Chundru <hidden>
Date: 2026-09-17 07:08:35
Also in:
linux-arm-msm, lkml
Subsystem:
mhi bus, the rest · Maintainers:
Manivannan Sadhasivam, Linus Torvalds
From: Vivek Pernamitta <redacted> As per MHI spec v1.2,sec 6.6, MHI has capability registers which are located after the ERDB array. The location of this group of registers is indicated by the MISCOFF register. Each capability has a capability ID to determine which functionality is supported and each capability will point to the next capability supported. Add a basic function to read those capabilities offsets. Signed-off-by: Vivek Pernamitta <redacted> Signed-off-by: Sivareddy Surasani <redacted> Signed-off-by: Krishna Chaitanya Chundru <redacted> --- drivers/bus/mhi/common.h | 11 +++++++++++ drivers/bus/mhi/host/init.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 43 insertions(+)
diff --git a/drivers/bus/mhi/common.h b/drivers/bus/mhi/common.h
index dda340aaed95..4c316f3d5a68 100644
--- a/drivers/bus/mhi/common.h
+++ b/drivers/bus/mhi/common.h@@ -16,6 +16,7 @@ #define MHICFG 0x10 #define CHDBOFF 0x18 #define ERDBOFF 0x20 +#define MISCOFF 0x24 #define BHIOFF 0x28 #define BHIEOFF 0x2c #define DEBUGOFF 0x30
@@ -113,6 +114,9 @@ #define MHISTATUS_MHISTATE_MASK GENMASK(15, 8) #define MHISTATUS_SYSERR_MASK BIT(2) #define MHISTATUS_READY_MASK BIT(0) +#define MISC_CAP_MASK GENMASK(31, 0) +#define CAP_CAPID_MASK GENMASK(31, 24) +#define CAP_NEXT_CAP_MASK GENMASK(23, 12) /* Command Ring Element macros */ /* No operation command */
@@ -204,6 +208,13 @@ #define MHI_RSCTRE_DATA_DWORD1 cpu_to_le32(FIELD_PREP(GENMASK(23, 16), \ MHI_PKT_TYPE_COALESCING)) +#define MHI_CAP_ID_INTX 0x1 +#define MHI_CAP_ID_TIME_SYNC 0x2 +#define MHI_CAP_ID_BW_SCALE 0x3 +#define MHI_CAP_ID_TSC_TIME_SYNC 0x4 +#define MHI_CAP_ID_MAX_TRB_LEN 0x5 +#define MHI_CAP_ID_MAX 0x6 + enum mhi_pkt_type { MHI_PKT_TYPE_INVALID = 0x0, MHI_PKT_TYPE_NOOP_CMD = 0x1,
diff --git a/drivers/bus/mhi/host/init.c b/drivers/bus/mhi/host/init.c
index fd3050889412..7ca2fe48c9ac 100644
--- a/drivers/bus/mhi/host/init.c
+++ b/drivers/bus/mhi/host/init.c@@ -465,6 +465,38 @@ static int mhi_init_dev_ctxt(struct mhi_controller *mhi_cntrl) return ret; } +static int mhi_find_capability(struct mhi_controller *mhi_cntrl, u32 capability) +{ + u32 val, cur_cap, next_offset, cur_offset; + int ret; + + /* Get the first supported capability offset */ + ret = mhi_read_reg_field(mhi_cntrl, mhi_cntrl->regs, MISCOFF, MISC_CAP_MASK, &cur_offset); + if (ret) + return 0; + + do { + if (cur_offset >= mhi_cntrl->reg_len) + return 0; + + ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, cur_offset, &val); + if (ret) + return 0; + + cur_cap = FIELD_GET(CAP_CAPID_MASK, val); + next_offset = FIELD_GET(CAP_NEXT_CAP_MASK, val); + if (cur_cap >= MHI_CAP_ID_MAX) + return 0; + + if (cur_cap == capability) + return cur_offset; + + cur_offset = next_offset; + } while (next_offset); + + return 0; +} + int mhi_init_mmio(struct mhi_controller *mhi_cntrl) { u32 val;
--
2.34.1