Re: [PATCH net-next v8 15/15] ax88796b: Add support for AX88772D, AX88179A and AX88279

+/* AX88179A-based PHYs cannot access MMD registers via MII_MMD_CTRL/MII_MMD_DATA
+ * Make sure to use c45 access instead.
+ */
+static int asix_read_mmd(struct phy_device *phydev, int devnum, u16 reg)
+{
+	struct mii_bus *bus = phydev->mdio.bus;
+	int addr = phydev->mdio.addr;
+
+	return __mdiobus_c45_read(bus, addr, devnum, reg);
+}
+
+static int asix_write_mmd(struct phy_device *phydev, int devnum, u16 reg, u16 val)
+{
+	struct mii_bus *bus = phydev->mdio.bus;
+	int addr = phydev->mdio.addr;
+
+	return __mdiobus_c45_write(bus, addr, devnum, reg, val);
+}

Please see aa63217916e1818a28b711384a9340d965ad073f

    net: phy: add generic helpers for direct C45 MMD access
    
    Some PHYs support direct C45 register access but not C22 indirect MMD
    access (registers 0xD and 0xE). When discovered via C22, phylib routes
    MMD access through the indirect path, which won't work on these
    devices.
    
    Add genphy_read_mmd_c45() and genphy_write_mmd_c45() as read_mmd/
    write_mmd callbacks that bypass the C22 indirect path and use the bus
    C45 accessors directly.


    Andrew

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pw-bot: cr