Re: [PATCH 2/4] dt-bindings: net: dsa: Add SoC-e switch IP and DSA bindings

On Wed, Aug 05, 2026 at 04:27:05PM +0200, Benedikt Spranger wrote:

Am Wed, 5 Aug 2026 15:53:59 +0200
schrieb Andrew Lunn [off-list ref]:

quoted

So i suspect you will need to support integration specific
compatibles.

Me too. But for *now* things are, better seem to be, simple. The aim is
not to plug forseeable future development.

quoted

One way to consider this. Look at your FPGA design. Delete the
licensed core. What do you have left? Does it need software to drive
it?

The minimal IP core is an unmanaged switch. No need for a DSA driver
here. The IP core profides a MDIO bus, therefor a MDIO driver would be
good. The version register in combination with some feature register
can be determined to get the needed information to configure the DSA
driver, or in the minimal case to return -ENODEV.

I think you misunderstood my comment. I expect the MDIO bus is part of
the licensed core. So when you take your FPGA design, and delete the
licensed part, that disappears as well. When you delete the licensed
part, you should have a big hole in the middle of the design, leaving
just what surrounds the switch. That is that logical? Clock dividers?
Logic to map the switch registers to MMIO, so maybe a PCIe device
core? Does any of this surrounding logic need software? If it does,
that is probably specific to your design, and needs a compatible which
covers both the licensed switch core, and the surrounding design
specific logic.

	Andrew