[PATCH net-next v4 6/6] r8169: add phylink support for RTL8127atf
From: javen <hidden>
Date: 2026-07-03 09:25:29
Also in:
lkml
Subsystem:
8169 10/100/1000 gigabit ethernet driver, ethernet phy library, networking drivers, networking [general], the rest · Maintainers:
Heiner Kallweit, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
From: Javen Xu <redacted> RTL8127 ATF is a 10G SFP mode of RTL8127. Like RTL8116af, it has no internal phy, so phylink uses a pcs to get the link status from the serdes registers instead of standard phy registers. The interface mode is PHY_INTERFACE_MODE_10GBASER. rtl_mac_select_pcs() returns tp->pcs for it, and the serdes is configured for 10G in pcs_config() via r8127_sfp_init_10g(). Speed and duplex are hardcoded to 10Gbps Full-Duplex. Signed-off-by: Javen Xu <redacted> --- Changes in v3: - No changes. New file. Changes in v4: - remove DUMMY_PHY in driver/net/phy/realtek/realtek_main.c and related function --- drivers/net/ethernet/realtek/r8169_main.c | 80 ++++++++++------------- drivers/net/phy/realtek/realtek_main.c | 53 --------------- include/net/phy/realtek_phy.h | 7 -- 3 files changed, 35 insertions(+), 105 deletions(-) delete mode 100644 include/net/phy/realtek_phy.h
diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c
index 0dd805f0d613..26d96edb3c42 100644
--- a/drivers/net/ethernet/realtek/r8169_main.c
+++ b/drivers/net/ethernet/realtek/r8169_main.c@@ -102,6 +102,7 @@ #define OCP_SDS_DATA_REG 0xEB14 #define SDS_CMD_READ 0x0001 #define RTL_SDS_C22_BASE 0x40 +#define RTL_SDS_C45_BASE 0x0080 #define RTL_PKG_DETECT 0xdc00 #define RTL_PKG_DETECT_MASK 0x0078 #define RTL_PKG_DETECT_8116AF 0x0030
@@ -1158,10 +1159,6 @@ static int r8168_phy_ocp_read(struct rtl8169_private *tp, u32 reg) if (rtl_ocp_reg_failure(reg)) return 0; - /* Return dummy MII_PHYSID2 in SFP mode to match SFP PHY driver */ - if (tp->sfp_mode == RTL_SFP_8127_ATF && reg == (OCP_STD_PHY_BASE + 2 * MII_PHYSID2)) - return PHY_ID_RTL_DUMMY_SFP & 0xffff; - RTL_W32(tp, GPHY_OCP, reg << 15); return rtl_loop_wait_high(tp, &rtl_ocp_gphy_cond, 25, 10) ?
@@ -1247,12 +1244,6 @@ static void r8127_sfp_init_10g(struct rtl8169_private *tp) r8168_phy_ocp_write(tp, 0xc804, (val & ~0x000f) | 0x000c); } -static void rtl_sfp_init(struct rtl8169_private *tp) -{ - if (tp->mac_version == RTL_GIGA_MAC_VER_80) - r8127_sfp_init_10g(tp); -} - static void rtl_sfp_reset(struct rtl8169_private *tp) { if (tp->mac_version == RTL_GIGA_MAC_VER_80)
@@ -2442,30 +2433,8 @@ static int rtl8169_set_link_ksettings(struct net_device *ndev, const struct ethtool_link_ksettings *cmd) { struct rtl8169_private *tp = netdev_priv(ndev); - struct phy_device *phydev = tp->phydev; - int duplex = cmd->base.duplex; - int speed = cmd->base.speed; - - if (tp->sfp_mode != RTL_SFP_8127_ATF) - return phylink_ethtool_ksettings_set(tp->phylink, cmd); - - if (cmd->base.autoneg != AUTONEG_DISABLE) - return -EINVAL; - if (!phy_check_valid(speed, duplex, phydev->supported)) - return -EINVAL; - - mutex_lock(&phydev->lock); - - phydev->autoneg = AUTONEG_DISABLE; - phydev->speed = speed; - phydev->duplex = duplex; - - rtl_sfp_init(tp); - - mutex_unlock(&phydev->lock); - - return 0; + return phylink_ethtool_ksettings_set(tp->phylink, cmd); } static int rtl8169_nway_reset(struct net_device *dev)
@@ -2614,9 +2583,6 @@ static void rtl8169_init_phy(struct rtl8169_private *tp) tp->pci_dev->subsystem_device == 0xe000) phy_write_paged(tp->phydev, 0x0001, 0x10, 0xf01b); - if (tp->sfp_mode == RTL_SFP_8127_ATF) - rtl_sfp_init(tp); - /* We may have called phy_speed_down before */ phy_speed_up(tp->phydev);
@@ -5036,7 +5002,7 @@ static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance) if (status & LinkChg) { if (tp->phydev) phy_mac_interrupt(tp->phydev); - else if (tp->sfp_mode == RTL_SFP_8168_AF) + else if (tp->sfp_mode) phylink_mac_change(tp->phylink, !!(RTL_R8(tp, PHYstatus) & LinkStatus)); }
@@ -5767,7 +5733,8 @@ static struct phylink_pcs *rtl_mac_select_pcs(struct phylink_config *config, if (!tp->pcs.ops) return NULL; - if (interface == PHY_INTERFACE_MODE_1000BASEX) + if (interface == PHY_INTERFACE_MODE_1000BASEX || + interface == PHY_INTERFACE_MODE_10GBASER) return &tp->pcs; return NULL;
@@ -5797,12 +5764,28 @@ static void rtl8169_pcs_get_state(struct phylink_pcs *pcs, struct phylink_link_state *state) { struct rtl8169_private *tp = container_of(pcs, struct rtl8169_private, pcs); - u16 bmsr, lpa; - bmsr = rtl8169_sds_read(tp, RTL_SDS_C22_BASE + MII_BMSR); - lpa = rtl8169_sds_read(tp, RTL_SDS_C22_BASE + MII_LPA); + if (tp->sfp_mode == RTL_SFP_8127_ATF) { + u16 stat1; + + stat1 = rtl8169_sds_read(tp, RTL_SDS_C45_BASE + MDIO_STAT1); + + if (!(stat1 & MDIO_STAT1_LSTATUS)) + stat1 = rtl8169_sds_read(tp, RTL_SDS_C45_BASE + MDIO_STAT1); + + state->link = !!(stat1 & MDIO_STAT1_LSTATUS); + if (!state->link) + return; - phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); + state->duplex = DUPLEX_FULL; + state->speed = SPEED_10000; + } else { + u16 bmsr, lpa; + + bmsr = rtl8169_sds_read(tp, RTL_SDS_C22_BASE + MII_BMSR); + lpa = rtl8169_sds_read(tp, RTL_SDS_C22_BASE + MII_LPA); + phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); + } } static int rtl8169_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
@@ -5810,6 +5793,11 @@ static int rtl8169_pcs_config(struct phylink_pcs *pcs, unsigned int mode, const unsigned long *advertising, bool permit_pause_to_mac) { + struct rtl8169_private *tp = container_of(pcs, struct rtl8169_private, pcs); + + if (tp->sfp_mode == RTL_SFP_8127_ATF) + r8127_sfp_init_10g(tp); + return 0; }
@@ -5855,7 +5843,7 @@ static unsigned long rtl8169_get_lpi_caps(struct rtl8169_private *tp) { unsigned long caps = 0; - if (!rtl_supports_eee(tp)) + if (!rtl_supports_eee(tp) || tp->sfp_mode == RTL_SFP_8127_ATF) return 0; caps |= MAC_100FD | MAC_1000FD;
@@ -5899,7 +5887,9 @@ static int rtl_init_phylink(struct rtl8169_private *tp) tp->phylink_config.mac_capabilities |= MAC_1000FD; break; case RTL_SFP_8127_ATF: - phy_mode = PHY_INTERFACE_MODE_INTERNAL; + tp->pcs.ops = &r8169_pcs_ops; + phy_mode = PHY_INTERFACE_MODE_10GBASER; + tp->phylink_config.default_an_inband = true; tp->phylink_config.mac_capabilities |= MAC_10000FD; break; default:
@@ -6129,7 +6119,7 @@ static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) if (rc) return rc; - if (tp->sfp_mode != RTL_SFP_8168_AF) { + if (tp->sfp_mode == RTL_SFP_NONE) { rc = r8169_mdio_register(tp); if (rc) { phylink_destroy(tp->phylink);
diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c
index b65d0f5fa1a0..7f904de583e0 100644
--- a/drivers/net/phy/realtek/realtek_main.c
+++ b/drivers/net/phy/realtek/realtek_main.c@@ -2646,45 +2646,6 @@ static irqreturn_t rtl8221b_handle_interrupt(struct phy_device *phydev) return IRQ_HANDLED; } -static int rtlgen_sfp_get_features(struct phy_device *phydev) -{ - linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, - phydev->supported); - - /* set default mode */ - phydev->speed = SPEED_10000; - phydev->duplex = DUPLEX_FULL; - - phydev->port = PORT_FIBRE; - - return 0; -} - -static int rtlgen_sfp_read_status(struct phy_device *phydev) -{ - int val, err; - - err = genphy_update_link(phydev); - if (err) - return err; - - if (!phydev->link) - return 0; - - val = phy_read(phydev, RTL_PHYSR); - if (val < 0) - return val; - - rtlgen_decode_physr(phydev, val); - - return 0; -} - -static int rtlgen_sfp_config_aneg(struct phy_device *phydev) -{ - return 0; -} - static struct phy_driver realtek_drvs[] = { { PHY_ID_MATCH_EXACT(0x00008201),
@@ -2934,20 +2895,6 @@ static struct phy_driver realtek_drvs[] = { .write_page = rtl821x_write_page, .read_mmd = rtl822x_read_mmd, .write_mmd = rtl822x_write_mmd, - }, { - PHY_ID_MATCH_EXACT(PHY_ID_RTL_DUMMY_SFP), - .name = "Realtek SFP PHY Mode", - .flags = PHY_IS_INTERNAL, - .probe = rtl822x_probe, - .get_features = rtlgen_sfp_get_features, - .config_aneg = rtlgen_sfp_config_aneg, - .read_status = rtlgen_sfp_read_status, - .suspend = genphy_suspend, - .resume = rtlgen_resume, - .read_page = rtl821x_read_page, - .write_page = rtl821x_write_page, - .read_mmd = rtl822x_read_mmd, - .write_mmd = rtl822x_write_mmd, }, { PHY_ID_MATCH_EXACT(0x001ccad0), .name = "RTL8224 2.5Gbps PHY",
diff --git a/include/net/phy/realtek_phy.h b/include/net/phy/realtek_phy.h
deleted file mode 100644
index d683bc1b0659..000000000000
--- a/include/net/phy/realtek_phy.h
+++ /dev/null@@ -1,7 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -#ifndef _REALTEK_PHY_H -#define _REALTEK_PHY_H - -#define PHY_ID_RTL_DUMMY_SFP 0x001ccbff - -#endif /* _REALTEK_PHY_H */
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2.43.0