Re: [PATCH v6 15/18] clk: mediatek: Add MT8189 dispsys clock support
From: David Lechner <dlechner@baylibre.com>
Date: 2026-03-12 20:07:13
Also in:
linux-arm-kernel, linux-clk, linux-devicetree, linux-mediatek, lkml
On Mon, 09 Mar 2026 20:04:57 +0800, irving.ch.lin [off-list ref] wrote:
Add support for the MT8189 dispsys clock controller, which provides clock gate control for display system.
...
+ GATE_MM0(CLK_MMSYS_0_DISP_DVO, "mmsys_0_disp_dvo", "disp0_sel", 20), + GATE_MM0(CLK_MMSYS_0_DISP_DSI0, "mmsys_0_CLK0", "disp0_sel", 21),
Why the random CAPS here? Seems like the name should be "mmsys_0_disp_dsi0" instead of "mmsys_0_CLK0".
+ /* MM1 */ + GATE_MM1(CLK_MMSYS_1_DISP_DSI0, "mmsys_1_CLK0", "dsi_occ_sel", 0),
Similar case here. -- David Lechner [off-list ref]