On Mon, Mar 09, 2026 at 08:04:43PM +0800, irving.ch.lin wrote:

From: Irving-CH Lin <redacted>

Add dt schema and IDs for the clocks of MediaTek MT8189 SoC.
The MT8189 clock IP provide clock control for main system
(apmixedsys, topcksys and vlpcksys) and
subsys (eg. peri, mfg, venc/vdec ...).

Signed-off-by: Irving-CH Lin <redacted>
---
 .../bindings/clock/mediatek,apmixedsys.yaml   |   1 +
 .../bindings/clock/mediatek,infracfg.yaml     |   1 +
 .../bindings/clock/mediatek,pericfg.yaml      |   1 +
 .../bindings/clock/mediatek,syscon.yaml       |  27 +
 .../bindings/clock/mediatek,topckgen.yaml     |   2 +
 .../dt-bindings/clock/mediatek,mt8189-clk.h   | 577 ++++++++++++++++++
 6 files changed, 609 insertions(+)
 create mode 100644 include/dt-bindings/clock/mediatek,mt8189-clk.h

Reviewed-by: Krzysztof Kozlowski <redacted>

Best regards,
Krzysztof