Re: [PATCH net-next 2/8] dt-bindings: net: lan9645x: add LAN9645X switch bindings

On Wed, Mar 04, 2026 at 05:10:11PM +0100, Jens Emil Schulz Ostergaard wrote:

On Tue, 2026-03-03 at 18:56 +0000, Conor Dooley wrote:

quoted

On Tue, Mar 03, 2026 at 01:22:28PM +0100, Jens Emil Schulz Østergaard wrote:

quoted

+examples:
+  - |
+    soc {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+      ethernet-switch@0 {
+        reg = <0>;

Also, this is an odd example, why are you at address 0 on a "soc" bus,
which usually means that this device on an AXI/AHB bus, and 0 is very
unusual for that. Obviously the example doesn't have to match the real
user, but this stands out.
I may have some follow up questions I think depending on your answer.

The intended way to bind this driver is via a parent MFD driver which sets
up the SPI register protocol, initiates regmaps and distributes them to child
devices (like this DSA driver).

Similar to mscc,vsc7512 in drivers/mfd/ocelot-spi.c.

This MFD would be the soc node. All child nodes perform register IO over
spi, using the regmaps requested from this parent so I think the addresses
on the bus are purely ornamental. Should I write the smallest register
address in all regions used by the DSA driver instead?

They are not ornamental, they should be the same addresses you'd put if
Linux had direct access to the SoC interconnect for MMIO, rather than to
an SPI bridge to the SoC interconnect. Or at least I don't see why it
wouldn't be that way.