Re: [PATCH net-next] net: phy: bcm84881: add BCM84891/BCM84892 support

Can you confirm whether bit 0 changes depending whether the PHY has
link. I don't know whether that's media link or host-side link, so
I suggest checking both.

Bit 12 does seem to track copper link state in my test:
  [0s] 0x3107  bit12=1   carrier=1   plugged
  [4s] 0x2107  bit12=0   carrier=0   unplugged
  [19s] 0x3107  bit12=1   carrier=0   replugged, PHY sees it
  [20s] 0x3107  bit12=1   carrier=1   phylib poll catches up

Bit 0 stayed at 1 through all of that, and through ifdown/ifup too.
I'm not sure what it is, but it doesn't appear to track either link
under the conditions I can test.

Bits[4:1] stayed at 3 through all of it: copper transitions, different
copper speeds (1G, 2.5G), ifdown/ifup, on both BCM84891 and BCM84892.
No USXGMII codes.

That looks like 0x4011 isn't documented on this PHY.

Indeed, it jumps from 0x4010 to 0x401A

There's also a bunch of MDIO commands that can be used to enquire the
status of USXGMII enable/AN enable, and what mode is used for 2.5G
and 5G.

U-Boot on my device uses SET_USXGMII during PHY init. I didn't plumb
the mailbox into the driver since phydev->interface from DT already
tells us the mode.

Daniel