[PATCH net-next 15/21] net: stmmac: rk: convert px30
From: Russell King (Oracle) <hidden>
Date: 2026-01-23 11:02:07
Also in:
linux-arm-kernel, linux-rockchip
Subsystem:
arm/rockchip soc support, networking drivers, stmmac ethernet driver, the rest · Maintainers:
Heiko Stuebner, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
Use rk_set_clk_mac_speed() rather than px30 specific function for configuring RMII clock. Signed-off-by: Russell King (Oracle) <redacted> --- .../net/ethernet/stmicro/stmmac/dwmac-rk.c | 38 ++----------------- 1 file changed, 4 insertions(+), 34 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
index 812e6729a703..802052beb668 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c@@ -251,49 +251,19 @@ static void rk_gmac_integrated_fephy_powerdown(struct rk_priv_data *priv, #define PX30_GRF_GMAC_CON1 0x0904 -/* PX30_GRF_GMAC_CON1 */ -#define PX30_GMAC_SPEED_10M GRF_CLR_BIT(2) -#define PX30_GMAC_SPEED_100M GRF_BIT(2) - static void px30_set_to_rmii(struct rk_priv_data *bsp_priv) { } -static int px30_set_speed(struct rk_priv_data *bsp_priv, - phy_interface_t interface, int speed) -{ - struct clk *clk_mac_speed = bsp_priv->clks[RK_CLK_MAC_SPEED].clk; - struct device *dev = bsp_priv->dev; - unsigned int con1; - long rate; - - if (!clk_mac_speed) { - dev_err(dev, "%s: Missing clk_mac_speed clock\n", __func__); - return -EINVAL; - } - - if (speed == 10) { - con1 = PX30_GMAC_SPEED_10M; - rate = 2500000; - } else if (speed == 100) { - con1 = PX30_GMAC_SPEED_100M; - rate = 25000000; - } else { - dev_err(dev, "unknown speed value for RMII! speed=%d", speed); - return -EINVAL; - } - - regmap_write(bsp_priv->grf, PX30_GRF_GMAC_CON1, con1); - - return clk_set_rate(clk_mac_speed, rate); -} - static const struct rk_gmac_ops px30_ops = { .set_to_rmii = px30_set_to_rmii, - .set_speed = px30_set_speed, + .set_speed = rk_set_clk_mac_speed, .gmac_grf_reg = PX30_GRF_GMAC_CON1, .gmac_phy_intf_sel_mask = GENMASK_U16(6, 4), + + .clock_grf_reg = PX30_GRF_GMAC_CON1, + .clock.mac_speed_mask = BIT_U16(2), }; #define RK3128_GRF_MAC_CON0 0x0168
--
2.47.3