On Tue, 14 Oct 2025 22:35:25 +0800, Luo Jie wrote:

The NSS clock controller on the IPQ5424 SoC provides clocks and resets
to the networking related hardware blocks such as the Packet Processing
Engine (PPE) and UNIPHY (PCS). Its parent clocks are sourced from the
GCC, CMN PLL, and UNIPHY blocks.

Additionally, register the gpll0_out_aux GCC clock, which serves as one
of the parent clocks for some of the NSS clocks.

[...]

Applied, thanks!

[10/10] arm64: defconfig: Build NSS clock controller driver for IPQ5424
        commit: 4e13c6aed86f4409d0e6385a6cdad41994575990

Best regards,
-- 
Bjorn Andersson [off-list ref]