Re: [PATCH v5 15/27] clk: mediatek: Add MT8196 ufssys clock support

[PATCH v5 00/27] Add support for MT8196 clock controllers · Laura Nao <hidden> · 2025-08-29
[PATCH v5 01/27] clk: mediatek: clk-pll: Add set/clr regs for shared PLL enable control · Laura Nao <hidden> · 2025-08-29
[PATCH v5 02/27] clk: mediatek: clk-pll: Add ops for PLLs using set/clr regs and FENC · Laura Nao <hidden> · 2025-08-29
[PATCH v5 03/27] clk: mediatek: clk-mux: Add ops for mux gates with set/clr/upd and FENC · Laura Nao <hidden> · 2025-08-29
Re: [PATCH v5 03/27] clk: mediatek: clk-mux: Add ops for mux gates with set/clr/upd and FENC · Chen-Yu Tsai <wenst@chromium.org> · 2025-09-05
[PATCH v5 06/27] clk: mediatek: clk-gate: Refactor mtk_clk_register_gate to use mtk_gate struct · Laura Nao <hidden> · 2025-08-29
Re: [PATCH v5 06/27] clk: mediatek: clk-gate: Refactor mtk_clk_register_gate to use mtk_gate struct · Chen-Yu Tsai <wenst@chromium.org> · 2025-09-05
Re: [PATCH v5 06/27] clk: mediatek: clk-gate: Refactor mtk_clk_register_gate to use mtk_gate struct · AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> · 2025-09-05
[PATCH v5 05/27] clk: mediatek: clk-mux: Add ops for mux gates with HW voter and FENC · Laura Nao <hidden> · 2025-08-29
Re: [PATCH v5 05/27] clk: mediatek: clk-mux: Add ops for mux gates with HW voter and FENC · Chen-Yu Tsai <wenst@chromium.org> · 2025-09-05
[PATCH v5 08/27] clk: mediatek: clk-mtk: Add MUX_DIV_GATE macro · Laura Nao <hidden> · 2025-08-29
[PATCH v5 04/27] clk: mediatek: clk-mtk: Introduce mtk_clk_get_hwv_regmap() · Laura Nao <hidden> · 2025-08-29
[PATCH v5 07/27] clk: mediatek: clk-gate: Add ops for gates with HW voter · Laura Nao <hidden> · 2025-08-29
Re: [PATCH v5 07/27] clk: mediatek: clk-gate: Add ops for gates with HW voter · Chen-Yu Tsai <wenst@chromium.org> · 2025-09-05
[PATCH v5 10/27] clk: mediatek: Add MT8196 apmixedsys clock support · Laura Nao <hidden> · 2025-08-29
[PATCH v5 09/27] dt-bindings: clock: mediatek: Describe MT8196 clock controllers · Laura Nao <hidden> · 2025-08-29
[PATCH v5 11/27] clk: mediatek: Add MT8196 topckgen clock support · Laura Nao <hidden> · 2025-08-29
[PATCH v5 12/27] clk: mediatek: Add MT8196 topckgen2 clock support · Laura Nao <hidden> · 2025-08-29
[PATCH v5 13/27] clk: mediatek: Add MT8196 vlpckgen clock support · Laura Nao <hidden> · 2025-08-29
Re: [PATCH v5 13/27] clk: mediatek: Add MT8196 vlpckgen clock support · Chen-Yu Tsai <wenst@chromium.org> · 2025-09-05
Re: [PATCH v5 13/27] clk: mediatek: Add MT8196 vlpckgen clock support · AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> · 2025-09-05
[PATCH v5 14/27] clk: mediatek: Add MT8196 peripheral clock support · Laura Nao <hidden> · 2025-08-29
Re: [PATCH v5 14/27] clk: mediatek: Add MT8196 peripheral clock support · Chen-Yu Tsai <wenst@chromium.org> · 2025-09-05
Re: [PATCH v5 14/27] clk: mediatek: Add MT8196 peripheral clock support · AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> · 2025-09-05
[PATCH v5 15/27] clk: mediatek: Add MT8196 ufssys clock support · Laura Nao <hidden> · 2025-08-29
Re: [PATCH v5 15/27] clk: mediatek: Add MT8196 ufssys clock support · Chen-Yu Tsai <wenst@chromium.org> · 2025-09-05
Re: [PATCH v5 15/27] clk: mediatek: Add MT8196 ufssys clock support · AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> · 2025-09-05
[PATCH v5 16/27] clk: mediatek: Add MT8196 pextpsys clock support · Laura Nao <hidden> · 2025-08-29
Re: [PATCH v5 16/27] clk: mediatek: Add MT8196 pextpsys clock support · Chen-Yu Tsai <wenst@chromium.org> · 2025-09-05
[PATCH v5 17/27] clk: mediatek: Add MT8196 I2C clock support · Laura Nao <hidden> · 2025-08-29
[PATCH v5 18/27] clk: mediatek: Add MT8196 mcu clock support · Laura Nao <hidden> · 2025-08-29
[PATCH v5 19/27] clk: mediatek: Add MT8196 mdpsys clock support · Laura Nao <hidden> · 2025-08-29
Re: [PATCH v5 19/27] clk: mediatek: Add MT8196 mdpsys clock support · Chen-Yu Tsai <wenst@chromium.org> · 2025-09-05
Re: [PATCH v5 19/27] clk: mediatek: Add MT8196 mdpsys clock support · AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> · 2025-09-05
Re: [PATCH v5 19/27] clk: mediatek: Add MT8196 mdpsys clock support · Chen-Yu Tsai <wenst@chromium.org> · 2025-09-05
Re: [PATCH v5 19/27] clk: mediatek: Add MT8196 mdpsys clock support · AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> · 2025-09-15
[PATCH v5 20/27] clk: mediatek: Add MT8196 mfg clock support · Laura Nao <hidden> · 2025-08-29
[PATCH v5 21/27] clk: mediatek: Add MT8196 disp0 clock support · Laura Nao <hidden> · 2025-08-29
[PATCH v5 22/27] clk: mediatek: Add MT8196 disp1 clock support · Laura Nao <hidden> · 2025-08-29
Re: [PATCH v5 22/27] clk: mediatek: Add MT8196 disp1 clock support · Chen-Yu Tsai <wenst@chromium.org> · 2025-09-05
Re: [PATCH v5 22/27] clk: mediatek: Add MT8196 disp1 clock support · AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> · 2025-09-05
[PATCH v5 23/27] clk: mediatek: Add MT8196 disp-ao clock support · Laura Nao <hidden> · 2025-08-29
Re: [PATCH v5 23/27] clk: mediatek: Add MT8196 disp-ao clock support · Jason-JH Lin (林睿祥) <hidden> · 2026-04-02
Re: [PATCH v5 23/27] clk: mediatek: Add MT8196 disp-ao clock support · Laura Nao <hidden> · 2026-04-02
Re: [PATCH v5 23/27] clk: mediatek: Add MT8196 disp-ao clock support · Jason-JH Lin (林睿祥) <hidden> · 2026-04-03
[PATCH v5 24/27] clk: mediatek: Add MT8196 ovl0 clock support · Laura Nao <hidden> · 2025-08-29
[PATCH v5 25/27] clk: mediatek: Add MT8196 ovl1 clock support · Laura Nao <hidden> · 2025-08-29
[PATCH v5 26/27] clk: mediatek: Add MT8196 vdecsys clock support · Laura Nao <hidden> · 2025-08-29
[PATCH v5 27/27] clk: mediatek: Add MT8196 vencsys clock support · Laura Nao <hidden> · 2025-08-29

From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Date: 2025-09-05 08:41:04
Also in: linux-arm-kernel, linux-clk, linux-devicetree, linux-mediatek, lkml

Il 29/08/25 11:19, Laura Nao ha scritto:

Add support for the MT8196 ufssys clock controller, which provides clock
gate control for UFS.

Co-developed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Laura Nao <redacted>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

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