On Wed, Aug 20, 2025 at 10:10:00PM +0200, Andrew Lunn wrote:

On Wed, Aug 20, 2025 at 09:43:41AM +0800, Yibo Dong wrote:

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On Tue, Aug 19, 2025 at 02:59:09PM +0100, Vadim Fedorenko wrote:

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On 18/08/2025 12:28, Dong Yibo wrote:

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Initialize n500/n210 chip bar resource map and
dma, eth, mbx ... info for future use.

[...]

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+struct mucse_hw {
+	void __iomem *hw_addr;
+	void __iomem *ring_msix_base;
+	struct pci_dev *pdev;
+	enum rnpgbe_hw_type hw_type;
+	struct mucse_dma_info dma;
+	struct mucse_eth_info eth;
+	struct mucse_mac_info mac;
+	struct mucse_mbx_info mbx;
+	u32 usecstocount;

What is this field for? You don't use it anywhere in the patchset apart
from initialization. Maybe it's better to introduce it once it's used?
Together with the defines of values for this field...

It is used to store chip frequency which is used to calculate values
related to 'delay register' in the future. I will improve this.

Maybe also see if you can find a better name. count is rather
vague. Count of what?

	Andrew

Chip use clock cycle not us(microsecond) to achieve timing. If chip is 125MHz,
driver setups a register to 125 to get 1us timing(125 * 10^6 * 10^(-6)). 
Maybe usecstocycle better?

Thanks for your feedback.