[PATCH v2 00/29] Add support for MT8196 clock controllers
From: Laura Nao <hidden>
Date: 2025-06-24 14:33:33
Also in:
linux-arm-kernel, linux-clk, linux-devicetree, linux-mediatek, lkml
Add support for MT8196 clock controllers This patch series introduces support for the clock controllers on the MediaTek MT8196 platform, following up on an earlier submission[1]. MT8196 uses a hardware voting mechanism to control some of the clock muxes and gates, along with a fence register responsible for tracking PLL and mux gate readiness. The series introduces support for these voting and fence mechanisms, and includes drivers for all clock controllers on the platform. [1] https://lore.kernel.org/all/20250307032942.10447-1-guangjie.song@mediatek.com/ (local) Changes in v2: - Fixed incorrect ID numbering in mediatek,mt8196-clock.h - Improved description for 'mediatek,hardware-voter' in mediatek,mt8196-clock.yaml and mediatek,mt8196-sys-clock.yaml - Added description for '#reset-cells' in mediatek,mt8196-clock.yaml - Added missing mediatek,mt8196-vdisp-ao compatible in mediatek,mt8196-clock.yaml - Fixed license in mediatek,mt8196-resets.h - Fixed missing of_match_table in clk-mt8196-vdisp_ao.c - Squashed commit adding UFS and PEXTP reset controller support - Reordered commits to place reset controller binding before dependent drivers - Added R-b tags Link to v1: https://lore.kernel.org/all/20250623102940.214269-1-laura.nao@collabora.com/ (local) AngeloGioacchino Del Regno (1): dt-bindings: reset: Add MediaTek MT8196 Reset Controller binding Laura Nao (28): clk: mediatek: clk-pll: Add set/clr regs for shared PLL enable control clk: mediatek: clk-pll: Add ops for PLLs using set/clr regs and FENC clk: mediatek: clk-mux: Add ops for mux gates with set/clr/upd and FENC clk: mediatek: clk-mtk: Introduce mtk_clk_get_hwv_regmap() clk: mediatek: clk-mux: Add ops for mux gates with HW voter and FENC clk: mediatek: clk-gate: Refactor mtk_clk_register_gate to use mtk_gate struct clk: mediatek: clk-gate: Add ops for gates with HW voter clk: mediatek: clk-mtk: Add MUX_DIV_GATE macro dt-bindings: clock: mediatek: Describe MT8196 peripheral clock controllers clk: mediatek: Add MT8196 apmixedsys clock support clk: mediatek: Add MT8196 topckgen clock support clk: mediatek: Add MT8196 topckgen2 clock support clk: mediatek: Add MT8196 vlpckgen clock support clk: mediatek: Add MT8196 peripheral clock support clk: mediatek: Add MT8196 ufssys clock support clk: mediatek: Add MT8196 pextpsys clock support clk: mediatek: Add MT8196 adsp clock support clk: mediatek: Add MT8196 I2C clock support clk: mediatek: Add MT8196 mcu clock support clk: mediatek: Add MT8196 mdpsys clock support clk: mediatek: Add MT8196 mfg clock support clk: mediatek: Add MT8196 disp0 clock support clk: mediatek: Add MT8196 disp1 clock support clk: mediatek: Add MT8196 disp-ao clock support clk: mediatek: Add MT8196 ovl0 clock support clk: mediatek: Add MT8196 ovl1 clock support clk: mediatek: Add MT8196 vdecsys clock support clk: mediatek: Add MT8196 vencsys clock support .../bindings/clock/mediatek,mt8196-clock.yaml | 87 ++ .../clock/mediatek,mt8196-sys-clock.yaml | 81 ++ drivers/clk/mediatek/Kconfig | 78 + drivers/clk/mediatek/Makefile | 14 + drivers/clk/mediatek/clk-gate.c | 106 +- drivers/clk/mediatek/clk-gate.h | 3 + drivers/clk/mediatek/clk-mt8196-adsp.c | 193 +++ drivers/clk/mediatek/clk-mt8196-apmixedsys.c | 203 +++ drivers/clk/mediatek/clk-mt8196-disp0.c | 169 +++ drivers/clk/mediatek/clk-mt8196-disp1.c | 170 +++ .../clk/mediatek/clk-mt8196-imp_iic_wrap.c | 117 ++ drivers/clk/mediatek/clk-mt8196-mcu.c | 166 +++ drivers/clk/mediatek/clk-mt8196-mdpsys.c | 187 +++ drivers/clk/mediatek/clk-mt8196-mfg.c | 150 ++ drivers/clk/mediatek/clk-mt8196-ovl0.c | 154 ++ drivers/clk/mediatek/clk-mt8196-ovl1.c | 153 ++ drivers/clk/mediatek/clk-mt8196-peri_ao.c | 144 ++ drivers/clk/mediatek/clk-mt8196-pextp.c | 131 ++ drivers/clk/mediatek/clk-mt8196-topckgen.c | 1257 +++++++++++++++++ drivers/clk/mediatek/clk-mt8196-topckgen2.c | 662 +++++++++ drivers/clk/mediatek/clk-mt8196-ufs_ao.c | 109 ++ drivers/clk/mediatek/clk-mt8196-vdec.c | 253 ++++ drivers/clk/mediatek/clk-mt8196-vdisp_ao.c | 79 ++ drivers/clk/mediatek/clk-mt8196-venc.c | 235 +++ drivers/clk/mediatek/clk-mt8196-vlpckgen.c | 769 ++++++++++ drivers/clk/mediatek/clk-mtk.c | 16 + drivers/clk/mediatek/clk-mtk.h | 23 + drivers/clk/mediatek/clk-mux.c | 119 +- drivers/clk/mediatek/clk-mux.h | 76 + drivers/clk/mediatek/clk-pll.c | 46 +- drivers/clk/mediatek/clk-pll.h | 9 + .../dt-bindings/clock/mediatek,mt8196-clock.h | 867 ++++++++++++ .../reset/mediatek,mt8196-resets.h | 26 + 33 files changed, 6828 insertions(+), 24 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt8196-clock.yaml create mode 100644 Documentation/devicetree/bindings/clock/mediatek,mt8196-sys-clock.yaml create mode 100644 drivers/clk/mediatek/clk-mt8196-adsp.c create mode 100644 drivers/clk/mediatek/clk-mt8196-apmixedsys.c create mode 100644 drivers/clk/mediatek/clk-mt8196-disp0.c create mode 100644 drivers/clk/mediatek/clk-mt8196-disp1.c create mode 100644 drivers/clk/mediatek/clk-mt8196-imp_iic_wrap.c create mode 100644 drivers/clk/mediatek/clk-mt8196-mcu.c create mode 100644 drivers/clk/mediatek/clk-mt8196-mdpsys.c create mode 100644 drivers/clk/mediatek/clk-mt8196-mfg.c create mode 100644 drivers/clk/mediatek/clk-mt8196-ovl0.c create mode 100644 drivers/clk/mediatek/clk-mt8196-ovl1.c create mode 100644 drivers/clk/mediatek/clk-mt8196-peri_ao.c create mode 100644 drivers/clk/mediatek/clk-mt8196-pextp.c create mode 100644 drivers/clk/mediatek/clk-mt8196-topckgen.c create mode 100644 drivers/clk/mediatek/clk-mt8196-topckgen2.c create mode 100644 drivers/clk/mediatek/clk-mt8196-ufs_ao.c create mode 100644 drivers/clk/mediatek/clk-mt8196-vdec.c create mode 100644 drivers/clk/mediatek/clk-mt8196-vdisp_ao.c create mode 100644 drivers/clk/mediatek/clk-mt8196-venc.c create mode 100644 drivers/clk/mediatek/clk-mt8196-vlpckgen.c create mode 100644 include/dt-bindings/clock/mediatek,mt8196-clock.h create mode 100644 include/dt-bindings/reset/mediatek,mt8196-resets.h -- 2.39.5