On 23/06/2025 12:29, Laura Nao wrote:

From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>

Add definitions to register the reset controllers found in the
UFS and PEXTP clock controllers.

Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Laura Nao <redacted>
---
 drivers/clk/mediatek/clk-mt8196-pextp.c  | 36 ++++++++++++++++++++++++
 drivers/clk/mediatek/clk-mt8196-ufs_ao.c | 25 ++++++++++++++++
 2 files changed, 61 insertions(+)

You just added these files. Don't add incomplete driver just to fix it
later. Add complete driver.

Patch should be squashed.

Best regards,
Krzysztof