Thread (4 messages) 4 messages, 3 authors, 2025-02-10

RE: [PATCH] net: dsa: microchip: KSZ8563 register regmap alignment to 32 bit boundaries

From: <hidden>
Date: 2025-02-10 17:51:01

Subject: Re: [PATCH] net: dsa: microchip: KSZ8563 register regmap alignment to 32 bit
boundaries

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Hello,

On Fri, Feb 07, 2025 at 05:00:37PM -0800, Jakub Kicinski wrote:
quoted
On Thu,  6 Feb 2025 13:22:45 +0100 Thorsten Scherer wrote:
quoted
-   regmap_reg_range(0x1122, 0x1127),
-   regmap_reg_range(0x112a, 0x112b),
-   regmap_reg_range(0x1136, 0x1139),
-   regmap_reg_range(0x113e, 0x113f),
+   regmap_reg_range(0x1120, 0x112b),
+   regmap_reg_range(0x1134, 0x113b),
+   regmap_reg_range(0x113c, 0x113f),
can these two not be merged?
I am not 100% sure.   But atm I don't see a reason why they could not.
When KSZ9896 register mapping was changed I already explained that
0xN100-0xN13F ranges map to PHY registers 0-0x1F, so it is safe to assign
only 2 ranges: regmap_reg_range(0x1100, 0x111f),
regmap_reg_range(0x0x1120, 0x113f).

The formula for accessing PHY register through port register is
0xN100 + reg * 2.

There is a bug in which high range 0xN120-0xN13f write has to be 32-bit.
quoted
quoted
    regmap_reg_range(0x1400, 0x1401),
    regmap_reg_range(0x1403, 0x1403),
    regmap_reg_range(0x1410, 0x1417),
@@ -747,10 +746,9 @@ static const struct regmap_range ksz8563_valid_regs[] =
{
quoted
quoted
    regmap_reg_range(0x2030, 0x2030),
    regmap_reg_range(0x2100, 0x2111),
    regmap_reg_range(0x211a, 0x211d),
-   regmap_reg_range(0x2122, 0x2127),
-   regmap_reg_range(0x212a, 0x212b),
-   regmap_reg_range(0x2136, 0x2139),
-   regmap_reg_range(0x213e, 0x213f),
+   regmap_reg_range(0x2120, 0x212b),
+   regmap_reg_range(0x2134, 0x213b),
+   regmap_reg_range(0x213c, 0x213f),
and these?
Dito.

Will send a v2 as soon as I can get my hands on the test board again
(next few days).
  
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