On Thu, Jun 27, 2024 at 03:41:26AM +0300, Serge Semin wrote:
+ clocks:
+ description:
+ Both MCI and APB3 interfaces are supposed to be equipped with a clock
+ source connected via the clk_csr_i line.
+
+ PCS/PMA layer can be clocked by an internal reference clock source
+ (phyN_core_refclk) or by an externally connected (phyN_pad_refclk) clock
+ generator. Both clocks can be supplied at a time.
+ minItems: 1
+ maxItems: 3
+
+ clock-names:
+ oneOf:
+ - minItems: 1
+ items:
+ - enum: [core, pad]
+ - const: pad
+ - minItems: 1
+ items:
+ - const: pclk
+ - enum: [core, pad]
+ - const: pad
While reading this, I'm kinda struggling to map "clk_csr_i" to a clock
name. Is that pclk? And why pclk if it is connected to "clk_csr_i"?
If two interfaces are meant to be "equipped" with that clock, how come
it is optional? I'm probably missing something...
Otherwise this binding looks fine to me.
Wee bit confused,
Conor.