Thread (22 messages) 22 messages, 4 authors, 2024-01-03

Re: [PATCH v2 1/3] net: phy: at803x: add QCA8084 ethernet phy support

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From: Maxime Chevallier <maxime.chevallier@bootlin.com>
Date: 2023-11-10 17:56:39
Also in: lkml

On Fri, 10 Nov 2023 16:53:39 +0800
Jie Luo [off-list ref] wrote:
On 11/9/2023 5:16 PM, Maxime Chevallier wrote:
quoted
Hello,

On Thu, 9 Nov 2023 16:32:36 +0800
Jie Luo [off-list ref] wrote:

[...]
  
quoted
quoted
What I understand from this is that this PHY can be used either as a
switch, in which case port 4 would be connected to the host interface
at up to 2.5G, or as a quad-phy, but since it uses QUSGMII the link
speed would be limited to 1G per-port, is that correct ?  
When the PHY works on the interface mode QUSGMII for quad-phy, all 4
PHYs can support to the max link speed 2.5G, actually the PHY can
support to max link speed 2.5G for all supported interface modes
including qusgmii and sgmii.  
I'm a bit confused then, as the USGMII spec says that Quad USGMII really
is for quad 10/100/1000 speeds, using 10b/8b encoding.

Aren't you using the USXGMII mode instead, which can convey 4 x 2.5Gbps
  with 66b/64b encoding ?

Thanks,

Maxime  
Hi Maxime,
Yes, for quad PHY mode, it is using 66b/64 encoding.

it seems that PHY_INTERFACE_MODE_USXGMII is for single port,
so i take the interface name PHY_INTERFACE_MODE_QUSGMII for
quad PHYs here.
I see, when I added the QUSGMII mode I wrongly stated that it came from
the USXGMII spec where it really comes from USGMII, my bad.
can we apply PHY_INTERFACE_MODE_USXGMII to quad PHYs in this
case(qca8084 quad PHY mode)?
From what I can see, the USXGMII mode in the kernel is used as the
single-port 10G mode of usxgmii. You might need to create a new mode
for quad usxgmii at 10G, the spec calls it 10G-QXGMII I think, but as
the spec defines quite a lot of modes, should we define all of them or
rely on some other parameters to select the actual mode ?

Andrew, Heiner, Russell, what do you think ?

Maxime
Thanks,
Jie.
  
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