Re: [PATCH 3/3] net: phy: at803x: add qca8081 fifo reset on the link down
From: Jie Luo <quic_luoj@quicinc.com>
Date: 2023-07-02 10:01:09
Also in:
lkml
From: Jie Luo <quic_luoj@quicinc.com>
Date: 2023-07-02 10:01:09
Also in:
lkml
On 7/2/2023 12:21 AM, Andrew Lunn wrote:
quoted
Hi Andrew, it is the PLL related registers, there is no PHY ID existed in MII register 2, 3 of this block, so it can't be instantiated as the generic PHY device.Well, phylib is going to scan those ID registers, and if it finds something other than 0xffff 0xffff in those two ID registers it is going to think a PHY is there. And then if there is no driver using that ID, it will instantiate a generic PHY. You might be able to see this in /sys/bus/mdio_bus, especially if you don't have a DT node representing the MDIO bus. Andrew
Okay, understand it. thanks Andrew for pointing this. i will check it.