[PATCH v3 10/19] ARM: dts: imx6dl-victgo: configure ethernet reference clock parent
From: Oleksij Rempel <o.rempel@pengutronix.de>
Date: 2023-01-31 08:51:33
Also in:
linux-clk, linux-devicetree, lkml
Subsystem:
the rest · Maintainer:
Linus Torvalds
On this board the PHY is the ref clock provider. So, configure ethernet reference clock as input. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> --- arch/arm/boot/dts/imx6dl-victgo.dts | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/imx6dl-victgo.dts b/arch/arm/boot/dts/imx6dl-victgo.dts
index 72df1dba83be..23274be08e61 100644
--- a/arch/arm/boot/dts/imx6dl-victgo.dts
+++ b/arch/arm/boot/dts/imx6dl-victgo.dts@@ -54,6 +54,7 @@ clk50m_phy: phy-clock { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <50000000>; + clock-output-names = "enet_ref_pad"; }; rotary-encoder {
@@ -134,6 +135,13 @@ vdiv_hitch_pos: voltage-divider-hitch-pos { }; }; +&clks { + clocks = <&clk50m_phy>; + clock-names = "enet_ref_pad"; + assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>; + assigned-clock-parents = <&clk50m_phy>; +}; + &ecspi2 { cs-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>; pinctrl-names = "default";
@@ -182,10 +190,6 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rmii"; - clocks = <&clks IMX6QDL_CLK_ENET>, - <&clks IMX6QDL_CLK_ENET>, - <&clk50m_phy>; - clock-names = "ipg", "ahb", "ptp"; phy-handle = <&rmii_phy>; status = "okay";
--
2.30.2