Re: [PATCH 01/18] dt-bindings: clock: sa8775p: add bindings for Qualcomm gcc-sa8775p
From: Krzysztof Kozlowski <hidden>
Date: 2023-01-09 18:20:26
Also in:
linux-arm-kernel, linux-arm-msm, linux-clk, linux-devicetree, linux-gpio, linux-iommu, linux-pm, lkml
On 09/01/2023 18:44, Bartosz Golaszewski wrote:
From: Bartosz Golaszewski <redacted> Add DT bindings for the GCC clock on SA8775P platforms. Add relevant DT include definitions as well. Signed-off-by: Bartosz Golaszewski <redacted> --- .../bindings/clock/qcom,gcc-sa8775p.yaml | 77 +++++
Use name style like SM8550.
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include/dt-bindings/clock/qcom,gcc-sa8775p.h | 320 ++++++++++++++++++ 2 files changed, 397 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-sa8775p.yaml create mode 100644 include/dt-bindings/clock/qcom,gcc-sa8775p.hdiff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sa8775p.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sa8775p.yaml new file mode 100644 index 000000000000..35d92d94495a --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sa8775p.yaml@@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,gcc-sa8775p.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Global Clock & Reset Controller on sa8775p + +maintainers: + - Bartosz Golaszewski <bartosz.golaszewski@linaro.org> + +description: | + Qualcomm global clock control module provides the clocks, resets and + power domains on sa8775p. + + See also:: include/dt-bindings/clock/qcom,gcc-sa8775p.h + +properties: + compatible: + const: qcom,gcc-sa8775p
Here as well.
+
+ clocks:
+ items:
+ - description: XO reference clock
+ - description: Sleep clock
+ - description: UFS memory first RX symbol clock
+ - description: UFS memory second RX symbol clock
+ - description: UFS memory first TX symbol clock
+ - description: UFS card first RX symbol clock
+ - description: UFS card second RX symbol clock
+ - description: UFS card first TX symbol clock
+ - description: Primary USB3 PHY wrapper pipe clock
+ - description: Secondary USB3 PHY wrapper pipe clock
+ - description: PCIe 0 pipe clock
+ - description: PCIe 1 pipe clock
+ - description: PCIe PHY clock
+ - description: First EMAC controller reference clock
+ - description: Second EMAC controller reference clock
+
+ protected-clocks:
+ maxItems: 240
+
+required:
+ - compatible
+ - clocks
+
+allOf:
+ - $ref: qcom,gcc.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,rpmh.h>
+ gcc: clock-controller@100000 {
+ compatible = "qcom,gcc-sa8775p";
+ reg = <0x100000 0xc7018>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&sleep_clk>,
+ <0>,
+ <0>,
+ <0>,
+ <0>,
+ <0>,
+ <0>,
+ <0>,
+ <0>,
+ <&usb_0_ssphy>,
+ <0>,
+ <0>,
+ <0>,
+ <0>;All these should be real in example.
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+ }; +...diff --git a/include/dt-bindings/clock/qcom,gcc-sa8775p.h b/include/dt-bindings/clock/qcom,gcc-sa8775p.h new file mode 100644 index 000000000000..badc253379c9 --- /dev/null +++ b/include/dt-bindings/clock/qcom,gcc-sa8775p.h
Filename needs adjustments.
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@@ -0,0 +1,320 @@ +/* SPDX-License-Identifier: GPL-2.0-only */
Dual license.
+/* + * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2023, Linaro Limited + */
Best regards, Krzysztof