[PATCH net-next 3/3] net: ag71xx: use phylink_generic_validate()
From: Russell King (Oracle) <hidden>
Date: 2021-11-17 16:46:44
Subsystem:
atlx ethernet drivers, networking drivers, the rest · Maintainers:
Chris Snook, Andrew Lunn, "David S. Miller", Eric Dumazet, Jakub Kicinski, Paolo Abeni, Linus Torvalds
ag71xx apparently only supports MII port type, which makes it different from other implementations. However, Oleksij says there is no special reason for this. Convert the driver to use phylink_generic_validate(), which will allow all ethtool port linkmodes instead of only MII, giving the driver consistent behaviour with other drivers. Signed-off-by: Russell King (Oracle) <redacted> --- drivers/net/ethernet/atheros/ag71xx.c | 31 +++------------------------ 1 file changed, 3 insertions(+), 28 deletions(-)
diff --git a/drivers/net/ethernet/atheros/ag71xx.c b/drivers/net/ethernet/atheros/ag71xx.c
index 20c2cfdc30da..c747dc7984fd 100644
--- a/drivers/net/ethernet/atheros/ag71xx.c
+++ b/drivers/net/ethernet/atheros/ag71xx.c@@ -1024,33 +1024,6 @@ static void ag71xx_mac_config(struct phylink_config *config, unsigned int mode, ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, ag->fifodata[2]); } -static void ag71xx_mac_validate(struct phylink_config *config, - unsigned long *supported, - struct phylink_link_state *state) -{ - __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; - - phylink_set(mask, MII); - - phylink_set(mask, Pause); - phylink_set(mask, Asym_Pause); - phylink_set(mask, Autoneg); - phylink_set(mask, 10baseT_Half); - phylink_set(mask, 10baseT_Full); - phylink_set(mask, 100baseT_Half); - phylink_set(mask, 100baseT_Full); - - if (state->interface == PHY_INTERFACE_MODE_SGMII || - state->interface == PHY_INTERFACE_MODE_RGMII || - state->interface == PHY_INTERFACE_MODE_GMII) { - phylink_set(mask, 1000baseT_Full); - phylink_set(mask, 1000baseX_Full); - } - - linkmode_and(supported, supported, mask); - linkmode_and(state->advertising, state->advertising, mask); -} - static void ag71xx_mac_pcs_get_state(struct phylink_config *config, struct phylink_link_state *state) {
@@ -1124,7 +1097,7 @@ static void ag71xx_mac_link_up(struct phylink_config *config, } static const struct phylink_mac_ops ag71xx_phylink_mac_ops = { - .validate = ag71xx_mac_validate, + .validate = phylink_generic_validate, .mac_pcs_get_state = ag71xx_mac_pcs_get_state, .mac_an_restart = ag71xx_mac_an_restart, .mac_config = ag71xx_mac_config,
@@ -1138,6 +1111,8 @@ static int ag71xx_phylink_setup(struct ag71xx *ag) ag->phylink_config.dev = &ag->ndev->dev; ag->phylink_config.type = PHYLINK_NETDEV; + ag->phylink_config.mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE | + MAC_10 | MAC_100 | MAC_1000FD; if ((ag71xx_is(ag, AR9330) && ag->mac_idx == 0) || ag71xx_is(ag, AR9340) ||
--
2.30.2