Thread (41 messages) flat view 41 messages, 4 authors, 2021-10-10

Re: [net-next PATCH 10/13] net: dsa: qca8k: add explicit SGMII PLL enable

From: Andrew Lunn <andrew@lunn.ch>
Date: 2021-10-07 00:30:10
Also in: linux-devicetree, lkml

On Thu, Oct 07, 2021 at 12:36:00AM +0200, Ansuel Smith wrote:
Support enabling PLL on the SGMII CPU port. Some device require this
special configuration or no traffic is transmitted and the switch
doesn't work at all. A dedicated binding is added to the CPU node
port to apply the correct reg on mac config.
Why not just enable this all the time when the CPU port is in SGMII
mode?

Is it also needed for 1000BaseX?

DT properties like this are hard to use. It would be better if the
switch can decide for itself if it needs the PLL enabled.

       Andrew
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