From: Koba Ko
Sent: 07 June 2021 05:35
...
After consulting with REALTEK, I can identify RTL8106e by PCI_VENDOR
REALTEK, DEVICE 0x8136, Revision 0x7.
I would like to make PHY_POLL as default for RTL8106E on V2.
because there's no side effects besides the cpu usage rate would be a
little higher,
How do you think?
If reading the PHY registers involves a software bit-bang
of an MII register (rather than, say, a sleep for interrupt
while the MAC unit does the bit-bang) then you can clobber
interrupt latency because of all the time spent spinning.
While this is less of a problem on multi-cpu systems I have
seen it result in ethernet packet loss on old systems.
David
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