Re: [PATCH v3] net: phy: add Maxlinear GPY115/21x/24x driver

quoted

quoted

+static int gpy_read_abilities(struct phy_device *phydev)
+{
+ int ret;
+
+ ret = genphy_read_abilities(phydev);
+ if (ret < 0)
+ return ret;
+
+ /* Detect 2.5G/5G support. */
+ ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_STAT2);
+ if (ret < 0)
+ return ret;
+ if (!(ret & MDIO_PMA_STAT2_EXTABLE))
+ return 0;
+
+ ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_EXTABLE);
+ if (ret < 0)
+ return ret;
+ if (!(ret & MDIO_PMA_EXTABLE_NBT))
+ return 0;
+
+ ret = phy_read_mmd(phydev, MDIO_MMD_PMAPMD, MDIO_PMA_NG_EXTABLE);
+ if (ret < 0)
+ return ret;
+
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT,
+ phydev->supported,
+ ret & MDIO_PMA_NG_EXTABLE_2_5GBT);
+
+ linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT,
+ phydev->supported,
+ ret & MDIO_PMA_NG_EXTABLE_5GBT);

This does not access vendor specific registers, should not this be part
of the standard genphy_read_abilities() or moved to a helper?

genphy_read_abilities does not cover 2.5G.

genphy_c45_pma_read_abilities checks C45 ids and this check fail if 
is_c45 is not set.

You appear to of ignored my comment about this. Please add the helper
to the core as i suggested, and then use
genphy_c45_pma_read_abilities().

	Andrew