Re: [PATCH net v1 1/3] net: phy: mscc: adding LCPLL reset to VSC8514

On Fri, 2021-02-12 at 16:54 +0100, Andrew Lunn wrote:

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On Fri, Feb 12, 2021 at 03:06:41PM +0100, Bjarni Jonasson wrote:

quoted

At Power-On Reset, transients may cause the LCPLL to lock onto a
clock that is momentarily unstable. This is normally seen in QSGMII
setups where the higher speed 6G SerDes is being used.
This patch adds an initial LCPLL Reset to the PHY (first instance)
to avoid this issue.

Hi Bjarni

https://www.kernel.org/doc/html/latest/process/stable-kernel-rules.html

These patches are rather large for stable, and not obviously correct.

There these problems hitting real users running stable kernels? Or is
it so broken it never really worked?

   Andrew

Correct, the current linux driver is unstable and has never really
worked properly.  Our in-house SDK driver already have these fixes and
the upstreamed version has been lagging behind.  And yes the patches
are big, we had to pull out the calibration from the 8051 into the
driver.