quoted
quoted
+static int sparx5_port_verify_speed(struct sparx5 *sparx5,
+ struct sparx5_port *port,
+ struct sparx5_port_config *conf)
+{
+ case PHY_INTERFACE_MODE_SGMII:
+ if (conf->speed != SPEED_1000 &&
+ conf->speed != SPEED_100 &&
+ conf->speed != SPEED_10 &&
+ conf->speed != SPEED_2500)
+ return sparx5_port_error(port, conf,
SPX5_PERR_SPEED);
Is it really SGMII over clocked at 2500? Or 2500BaseX?
Yes the SGMII mode in the serdes driver is overclocked.
Nothing in the switch driver needs changing when changing between
speeds 1G/2G5.
So it continues to use the SGMII inband signalling?
There is a lot of confusion in this area, but SGMII inband signalling
overclocked does not make much sense. So it is more likely to be using
2500BaseX.
Andrew