Thread (13 messages) 13 messages, 3 authors, 2020-08-04

RE: [PATCH 2/2] net: phy: Associate device node with fixed PHY

From: Madalin Bucur (OSS) <hidden>
Date: 2020-08-03 08:33:25

Possibly related (same subject, not in this thread)

-----Original Message-----
From: netdev-owner@vger.kernel.org <redacted> On
Behalf Of Andrew Lunn
Sent: 01 August 2020 18:11
To: Russell King - ARM Linux admin <linux@armlinux.org.uk>
Cc: Vikas Singh <redacted>; f.fainelli@gmail.com;
hkallweit1@gmail.com; netdev@vger.kernel.org; Calvin Johnson (OSS)
[off-list ref]; kuldip dwivedi
[off-list ref]; Madalin Bucur (OSS)
[off-list ref]; Vikas Singh [off-list ref]
Subject: Re: [PATCH 2/2] net: phy: Associate device node with fixed PHY

On Sat, Aug 01, 2020 at 10:41:32AM +0100, Russell King - ARM Linux admin
wrote:
quoted
On Sat, Aug 01, 2020 at 09:52:52AM +0530, Vikas Singh wrote:
quoted
Hi Andrew,

Please refer to the "fman" node under
linux/arch/arm64/boot/dts/freescale/fsl-ls1046a-rdb.dts
I have two 10G ethernet interfaces out of which one is of fixed-link.
Please do not top post.

How does XGMII (which is a 10G only interface) work at 1G speed?  Is
what is in DT itself a hack because fixed-phy doesn't support 10G
modes?
My gut feeling is there is some hack going on here, which is why i'm
being persistent at trying to understand what is actually going on
here.
Hi Andrew,

That platform used 1G fixed link there since there was no support for
10G fixed link at the time. PHYlib could have tolerated 10G speed there
With a one-liner. I understand that PHYLink is working to describe this
Better, but it was not there at that time. Adding the dependency on
PHYLink was not desirable as most of the users for the DPAA 1 platforms
were targeting kernels before the PHYLink introduction (and last I've
looked, it's still under development, with unstable APIs so we'll
take a look at this later, when it settles).
So Vikas, as Russell pointed out, fixed-link is limited to 1G. It
seems odd you are running a 10G link at 1G. It is also unclear what
you have on the other end of that fixed link? Is it an SFP and you are
afraid of the work needed to get phylink working with ACPI? Is it an
Ethernet switch, and you are afraid of the work needed to get DSA
working with ACPI?

Looking at
https://www.nxp.com/docs/en/quick-reference-guide/LS1046AQRS.pdf

I see a XFI/2-5G SGMII port connected to a PHY, which i guess is

       ethernet@f0000 { /* 10GEC1 */
                phy-handle = <&aqr106_phy>;
                phy-connection-type = "xgmii";
        };

and
                aqr106_phy: ethernet-phy@0 {
                        compatible = "ethernet-phy-ieee802.3-c45";
                        interrupts = <0 131 4>;
                        reg = <0x0>;
                };

Which leaves an XFI interface connected to a retimer and then to an
SFP cage? Is this where you are using fixed-link?

	Andrew
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