Re: [PATCH devicetree 3/4] arm64: dts: fsl: ls1028a: add node for Felix switch

Hi Andrew,

On Mon, 17 Feb 2020 at 19:24, Vladimir Oltean [off-list ref] wrote:

On Mon, 17 Feb 2020 at 17:33, Vladimir Oltean [off-list ref] wrote:

quoted

Hi Andrew,

On Mon, 17 Feb 2020 at 17:29, Andrew Lunn [off-list ref] wrote:

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Hi Vladimir

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+                                     /* Internal port with DSA tagging */
+                                     mscc_felix_port4: port@4 {
+                                             reg = <4>;
+                                             phy-mode = "gmii";

Is it really using gmii? Often in SoC connections use something else,
and phy-mode = "internal" is more appropriate.

What would be that "something else"? Given that the host port and the
switch are completely different hardware IP blocks, I would assume
that a parallel GMII is what's connecting them, no optimizations done.
Certainly no serializer. But I don't know for sure.
Does it matter, in the end?

To clarify, the reason I'm asking whether it matters is because I'd
have to modify PHY_INTERFACE_MODE_GMII in
drivers/net/dsa/ocelot/felix_vsc9959.c too, for the internal ports.
Then I'm not sure anymore what tree this device tree patch should go
in through.

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+                                             ethernet = <&enetc_port2>;
+
+                                             fixed-link {
+                                                     speed = <2500>;
+                                                     full-duplex;
+                                             };

gmii and 2500 also don't really go together.

Not even if you raise the clock frequency?

quoted

     Andrew

Thanks,
-Vladimir

Correct me if I'm wrong, but I think that PHY_INTERFACE_MODE_INTERNAL
is added by Florian in 2017 as a generalization of the BCM7445 DSA
switch bindings with internal PHY ports, and later became "popular"
with other DSA drivers (ar9331, lantiq gswip). Of those, ar9331 is
actually using phy-mode = "gmii" for the CPU port, and phy-mode =
"internal" for the embedded copper PHYs.
I hate to be making this sort of non-binary decision. Is it a GMII
interface _or_ an internal interface? Prior to 2017, this would have
probably been a non-question. The patch series which adds it does not
clarify "you should use this mode in situation A, and this mode in
situation B" either.

Regards,
-Vladimir