Re: [PATCH 1/3] macb: bindings doc: update sifive fu540-c000 binding
From: <Nicolas.Ferre@microchip.com>
Date: 2019-07-19 12:02:36
Also in:
linux-devicetree, linux-riscv, lkml
On 19/07/2019 at 13:10, Yash Shah wrote:
As per the discussion with Nicolas Ferre, rename the compatible property to a more appropriate and specific string. LINK: https://lkml.org/lkml/2019/7/17/200 Signed-off-by: Yash Shah <redacted>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
quoted hunk ↗ jump to hunk
--- Documentation/devicetree/bindings/net/macb.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)diff --git a/Documentation/devicetree/bindings/net/macb.txt b/Documentation/devicetree/bindings/net/macb.txt index 63c73fa..0b61a90 100644 --- a/Documentation/devicetree/bindings/net/macb.txt +++ b/Documentation/devicetree/bindings/net/macb.txt@@ -15,10 +15,10 @@ Required properties: Use "atmel,sama5d4-gem" for the GEM IP (10/100) available on Atmel sama5d4 SoCs. Use "cdns,zynq-gem" Xilinx Zynq-7xxx SoC. Use "cdns,zynqmp-gem" for Zynq Ultrascale+ MPSoC. - Use "sifive,fu540-macb" for SiFive FU540-C000 SoC. + Use "sifive,fu540-c000-gem" for SiFive FU540-C000 SoC. Or the generic form: "cdns,emac". - reg: Address and length of the register set for the device - For "sifive,fu540-macb", second range is required to specify the + For "sifive,fu540-c000-gem", second range is required to specify the address and length of the registers for GEMGXL Management block. - interrupts: Should contain macb interrupt - phy-mode: See ethernet.txt file in the same directory.
-- Nicolas Ferre