Re: [PATCH net-next v3 17/17] net: WireGuard secure network tunnel
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From: kbuild test robot <hidden>
Date: 2018-09-11 13:17:19
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Hi Jason, I love your patch! Yet something to improve: [auto build test ERROR on net-next/master] url: https://github.com/0day-ci/linux/commits/Jason-A-Donenfeld/WireGuard-Secure-Network-Tunnel/20180911-185037 config: arm-at91_dt_defconfig (attached as .config) compiler: arm-linux-gnueabi-gcc (Debian 7.2.0-11) 7.2.0 reproduce: wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree GCC_VERSION=7.2.0 make.cross ARCH=arm All errors (new ones prefixed by >>): arch/arm/vfp/vfphw.S: Assembler messages:
quoted
arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c0' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c1' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c2' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c3' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c4' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c5' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c6' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c7' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c8' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c9' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c10' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c11' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c12' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c13' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c14' in ARM mode arch/arm/vfp/vfphw.S:299: Error: selected processor does not support `mrrc p11,3,r0,r1,c15' in ARM mode arch/arm/vfp/vfphw.S:321: Error: selected processor does not support `mcrr p11,3,r0,r1,c0' in ARM mode arch/arm/vfp/vfphw.S:321: Error: selected processor does not support `mcrr p11,3,r0,r1,c1' in ARM mode arch/arm/vfp/vfphw.S:321: Error: selected processor does not support `mcrr p11,3,r0,r1,c2' in ARM mode arch/arm/vfp/vfphw.S:321: Error: selected processor does not support `mcrr p11,3,r0,r1,c3' in ARM mode
vim +299 arch/arm/vfp/vfphw.S ^1da177e Linus Torvalds 2005-04-16 285 93ed3970 Catalin Marinas 2008-08-28 286 ENTRY(vfp_get_double) 07f33a03 Catalin Marinas 2009-07-24 287 tbl_branch r0, r3, #3 ^1da177e Linus Torvalds 2005-04-16 288 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 07f33a03 Catalin Marinas 2009-07-24 289 1: fmrrd r0, r1, d\dr 6ebbf2ce Russell King 2014-06-30 290 ret lr 07f33a03 Catalin Marinas 2009-07-24 291 .org 1b + 8 ^1da177e Linus Torvalds 2005-04-16 292 .endr 25ebee02 Catalin Marinas 2007-09-25 293 #ifdef CONFIG_VFPv3 25ebee02 Catalin Marinas 2007-09-25 294 @ d16 - d31 registers 25ebee02 Catalin Marinas 2007-09-25 295 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 07f33a03 Catalin Marinas 2009-07-24 296 1: mrrc p11, 3, r0, r1, c\dr @ fmrrd r0, r1, d\dr 6ebbf2ce Russell King 2014-06-30 297 ret lr 07f33a03 Catalin Marinas 2009-07-24 298 .org 1b + 8 25ebee02 Catalin Marinas 2007-09-25 @299 .endr 25ebee02 Catalin Marinas 2007-09-25 300 #endif ^1da177e Linus Torvalds 2005-04-16 301 25ebee02 Catalin Marinas 2007-09-25 302 @ virtual register 16 (or 32 if VFPv3) for compare with zero ^1da177e Linus Torvalds 2005-04-16 303 mov r0, #0 ^1da177e Linus Torvalds 2005-04-16 304 mov r1, #0 6ebbf2ce Russell King 2014-06-30 305 ret lr 93ed3970 Catalin Marinas 2008-08-28 306 ENDPROC(vfp_get_double) ^1da177e Linus Torvalds 2005-04-16 307 93ed3970 Catalin Marinas 2008-08-28 308 ENTRY(vfp_put_double) 07f33a03 Catalin Marinas 2009-07-24 309 tbl_branch r2, r3, #3 ^1da177e Linus Torvalds 2005-04-16 310 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 07f33a03 Catalin Marinas 2009-07-24 311 1: fmdrr d\dr, r0, r1 6ebbf2ce Russell King 2014-06-30 312 ret lr 07f33a03 Catalin Marinas 2009-07-24 313 .org 1b + 8 ^1da177e Linus Torvalds 2005-04-16 314 .endr 25ebee02 Catalin Marinas 2007-09-25 315 #ifdef CONFIG_VFPv3 25ebee02 Catalin Marinas 2007-09-25 316 @ d16 - d31 registers 25ebee02 Catalin Marinas 2007-09-25 317 .irp dr,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15 138de1c4 Russell King 2010-05-27 318 1: mcrr p11, 3, r0, r1, c\dr @ fmdrr r0, r1, d\dr 6ebbf2ce Russell King 2014-06-30 319 ret lr 07f33a03 Catalin Marinas 2009-07-24 320 .org 1b + 8 25ebee02 Catalin Marinas 2007-09-25 @321 .endr :::::: The code at line 299 was first introduced by commit :::::: 25ebee020bd34d1f4c5678538204f0b10bf9f6d5 [ARM] 4583/1: ARMv7: Add VFPv3 support :::::: TO: Catalin Marinas [off-list ref] :::::: CC: Russell King [off-list ref] --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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- .config.gz [application/gzip] 23776 bytes