On 2/19/15, 6:18 PM, Andrew Lunn wrote:

quoted

quoted

Remember that we are dealing with hardware switch chips. Those chips
won't time out fdb entries just because the kernel's bridge driver
thinks that it should.

Oh, they dont..?

To some extent, it is better to think of these as two switches
connected to each other, not one switch. The HW switch needs help with
STP, but otherwise it is a fully functional and autonomous switch.

yes, exactly.

This is going to make displaying the forwarding database interesting,
because the SW bridge fdb and the HW bridge fdb are each subsets of
the big picture and possible even contradictory since they are not
updated atomically.

What we do on our switches is,
- disable SW bridge learning
- enable HW bridge learning
- we keep the SW bridge fdb in sync with the HW fdb, which leads to:
         - HW learnt entries are pushed to SW bridge fdb
         - SW static fdb entries (added by the user) are pushed to HW