On Tue, 2014-03-25 at 18:34 -0500, dinguyen@altera.com wrote:
- #size-cells = <1>;
- compatible = "altr,socfpga-stmmac";
- altr,sysmgr-syscon = <&sysmgr 0x60>;
+ gmac0: ethernet@ff700000 {
+ compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";
status = "disabled";
- ranges;
-
- gmac0: gmac0@ff700000 {
- compatible = "snps,dwmac-3.70a", "snps,dwmac";
- reg = <0xff700000 0x2000>;
- interrupts = <0 115 4>;
- interrupt-names = "macirq";
- mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
- clocks = <&emac0_clk>;
- clock-names = "stmmaceth";
- };
+ altr,sysmgr-syscon = <&sysmgr 0x60>;
+ reg = <0xff700000 0x2000>;
+ interrupts = <0 115 4>;
+ interrupt-names = "macirq";
+ mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */
+ clocks = <&emac0_clk>;
+ clock-names = "stmmaceth";
};
not strictly related to this patch, but noticed in bypassing:
is the 'clocks' spec correct? ISTR that 'emac0_clk' is the PLL
output, while the gated clock for the EMAC IP block is named
'emac_0_clk' (note the extra underscore)
virtually yours
Gerhard Sittig
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