On Wed, Aug 22, 2012 at 03:24:59PM +0100, Ben Hutchings wrote:
-#ifdef EFX_USE_QWORD_IO
+#if defined(EFX_USE_OWORD_IO)
+ _efx_writeo(efx, value->u128, reg);
+#elif defined(EFX_USE_QWORD_IO)
_efx_writeq(efx, value->u64[0], reg + 0);
_efx_writeq(efx, value->u64[1], reg + 8);
#else
This looks like a perfect fit for write combining. I have traces showing
that enabling write combining on MMIO does indeed generate a single PCIe
transaction on at least a couple of different current systems. Why is
that not an option?
-ben
--
"Thought is the essence of where you are now."