From: Claudiu Manoil <redacted>
Date: Thu, 28 Jun 2012 17:40:53 +0300
The correct behavior is to program the interrupt coalescing regs
(RXICr/TXICr) in accordance with the Rx/Tx Q's "rx/txcoalescing"
flag. That is, if the coalescing flag is 0 for a given Rx/Tx queue
then the corresponding coalescing register should be cleared.
This behavior is correctly implemented for the single-queue mode
(SQ_SG_MODE), but not for the multi-queue mode (MQ_MG_MODE).
This fixes the later case.
Signed-off-by: Claudiu Manoil <redacted>
Applied, thanks.