Re: [PATCH 03/10] stmmac: sanitize the rx coe and add the type-1 csum

On 4/3/2012 9:56 AM, deepaksi wrote:

Ciao Peppe,

On 4/3/2012 12:19 PM, Giuseppe CAVALLARO wrote:

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[snip]

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reset.

Previously, the stmmac called the dwmac1000_rx_coe_supported to verify
it could do the CSUM in Hw. If true the driver used the type 2 by
default.

I've voluntarily removed this function because not necessary anymore.
In fact, YOU improved the rx_coe from the platform. If it is passed as
STMMAC_RX_COE_NONE then it means the driver is not able to perform any
csum for the incoming frames. This is actually used on old gmac/mac
cores. In new cores, the HW cap register will be used to manage and fix
this logic.
I could restore the core you are mentioning  but just to do another
safety check at run-time in case of the user provided a broken setting
from the platform and there is not the HW cap register. Hmm, I do not
know if this actually could help indeed... just an extra check IMHO.

These are the updates required in the code.

In function dwmac1000_core_init(), you may need to set the IPC bit based
on the fact that
if rx_coe has been setup through the platform code.
This bit set is a must for the checksum offload to be enabled. Rest of
the code looks good.

Great Deepak,
sorry I had not understood your good question and thx for you call.
I was wrong and the IPC Checksum Offload has to be set in the MAC
Configuration Register (*).

static int dwmac1000_rx_coe_supported(void __iomem *ioaddr)
{
    u32 value = readl(ioaddr + GMAC_CONTROL);  |
                                               |==> :-) (*)
    value |= GMAC_CONTROL_IPC;                 |
    writel(value, ioaddr + GMAC_CONTROL);      |

    NOTE ===>>> I'm going to remove the extra check below because
                useless as I had told in my previous email.
                Is it ok for you? Let me know.

    value = readl(ioaddr + GMAC_CONTROL);

    return !!(value&  GMAC_CONTROL_IPC);
}


I'll rework it and re-send all the patches with this fix soon.

ciao
Peppe

Deepak

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I hope this clears the things a bit. Sorry for the miscommunication.

No problem for the miscommunication ;-)

Let me know
Ciao
Peppe

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Rgds
Deepak

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Regards
Deepak

.

.

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