Re: [net-next 5/6] ixgbe: add hardware timestamping support

On Mon, Oct 17, 2011 at 05:21:01AM -0700, Jeff Kirsher wrote:

The cyclecounter has the potential to miss a wrap-around of the
systim register (this should occur no more often than every 35
seconds) unless some activity regarding the cycle counter occurs at
least once within this time. This version adds a cycle counter read
every time the watchdog task is run, which should occur at least once
within this timeframe. Any packets being timestamped will also count
as a read due to the call to timecompare_update.

So, is this wrap around due to the fact that you are tied to the
system time via time_compare? Or, putting it another way, can't you
program the hardware time stamping unit so that the registers have
some reasonable resolution (like 64 bits worth of nanoseconds) and
just offer RAW timestamps?

I would really like to move away from the timecompare hacks and
towards a proper PHC->SYS PPS solution.

This version fixes an issue regarding timecompare not updating
detected skew after the clock offset is changed due to ptpd or outside
influence from the OS. Now the skew detection is forced just before we
hand a timestamp up to the kernel stack

Again, doing the update thing on every packet won't work for real
world PTP scenarios.

Thanks,
Richard