Re: [PATCH 6/24] make atomic_read() behave consistently on frv

Paul E. McKenney [off-list ref] wrote:

On Sat, Aug 11, 2007 at 08:54:46AM +0800, Herbert Xu wrote:

quoted

Chris Snook [off-list ref] wrote:

quoted

cpu_relax() contains a barrier, so it should do the right thing.  For 
non-smp architectures, I'm concerned about interacting with interrupt 
handlers.  Some drivers do use atomic_* operations.

What problems with interrupt handlers? Access to int/long must
be atomic or we're in big trouble anyway.

Reordering due to compiler optimizations.  CPU reordering does not
affect interactions with interrupt handlers on a given CPU, but
reordering due to compiler code-movement optimization does.  Since
volatile can in some cases suppress code-movement optimizations,
it can affect interactions with interrupt handlers.

If such reordering matters, then you should use one of the
*mb macros or barrier() rather than relying on possibly
hidden volatile cast.

Cheers,
-- 
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