From: Jeff Garzik <redacted>
Date: Sat, 28 Jul 2007 14:08:44 -0400

That's a performance/parallelization regression from current NAPI :(

That's not true since current NAPI will only run on one cpu, the
one that the interrupt triggers on.

The existing cases that are not guarding the sequence to be
atomic are racy, and in a way which is very hard to debug when
it triggers and the device just appears dead.