Steve.Glendinning@smsc.com [off-list ref] :

Mezigues :

[...]

quoted

Does the platform guarantees that the register write has actually 

reached

quoted

the real register when the udelay is issued ?

I think so, but maybe you can help me check.  The LAN911x device is always 
directly connected to a simple SRAM-like host bus, and smsc911x_reg_write 
is implemented using readl.  Does this implicitly guarantee it to be 
volatile?

(s/readl/writel/)

It's probably safe if it's non-cached SRAM like but I strongly suggest to
read Documentation/DocBook/deviceiobook.tmpl. It explains better than me.

[...]

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quoted

             spin_lock_irqsave(&pdata->phy_lock, flags);

flags useless: ->open() is issued in irq-enabled context.

How do you mean? I thought an irq-enabled context meant i DO have to 
disable irqs?

Yes but you can disable unconditionally and later enable unconditionnally
because you know that the irq are _always_ enabled before the lock (in
->open()).

'flags' saves the state. If the state is constant, you can either:
- s/spin_{lock_irqsave/unlock_irqrestore}/spin_{lock/unlock}_irq/
  (irq always on before the lock)
or:
- s/spin_{lock_irqsave/unlock_irqrestore}/spin_{lock/unlock}/
  (irq always off before the lock)

-- 
Ueimor