Re: 2.6.9-rc1-bk11+ and 2.6.9-rc1-mm3,4 r8169: freeze during boot (FIX included)
From: Francois Romieu <romieu@fr.zoreil.com>
Date: 2004-09-20 21:16:14
Also in:
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Jeff Garzik [off-list ref] : [...]
Let me know what happens :)
Nothing conclusive so far. I applied patch below on my 32bit system on top of current 2.6.9-rc2-mm1 + patch issued yesterday + extra hack to force PCI DAC on 32 bit system. It does not help if I force PCI DAC. It does not change anything if PCI DAC is not enabled. diff -puN drivers/net/r8169.c~r8169-145b-4 drivers/net/r8169.c
--- linux-2.6.9-rc2/drivers/net/r8169.c~r8169-145b-4 2004-09-20 21:39:20.000000000 +0200
+++ linux-2.6.9-rc2-fr/drivers/net/r8169.c 2004-09-20 21:39:20.000000000 +0200@@ -1483,6 +1483,11 @@ rtl8169_hw_start(struct net_device *dev) void *ioaddr = tp->mmio_addr; u32 i; + RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK)); + RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32)); + RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK)); + RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32)); + /* Soft reset the chip. */ RTL_W8(ChipCmd, CmdReset);
@@ -1494,7 +1499,6 @@ rtl8169_hw_start(struct net_device *dev) } RTL_W8(Cfg9346, Cfg9346_Unlock); - RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); RTL_W8(EarlyTxThres, EarlyTxThld); // For gigabit rtl8169
@@ -1509,24 +1513,9 @@ rtl8169_hw_start(struct net_device *dev) RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) | (InterFrameGap << TxInterFrameGapShift)); - tp->cp_cmd |= RTL_R16(CPlusCmd); - RTL_W16(CPlusCmd, tp->cp_cmd); - - if (tp->mac_version == RTL_GIGA_MAC_VER_D) { - dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. " - "Bit-3 and bit-14 MUST be 1\n"); - tp->cp_cmd |= (1 << 14) | PCIMulRW; - RTL_W16(CPlusCmd, tp->cp_cmd); - } - tp->cur_rx = 0; - RTL_W32(TxDescStartAddrLow, ((u64) tp->TxPhyAddr & DMA_32BIT_MASK)); - RTL_W32(TxDescStartAddrHigh, ((u64) tp->TxPhyAddr >> 32)); - RTL_W32(RxDescAddrLow, ((u64) tp->RxPhyAddr & DMA_32BIT_MASK)); - RTL_W32(RxDescAddrHigh, ((u64) tp->RxPhyAddr >> 32)); RTL_W8(Cfg9346, Cfg9346_Lock); - udelay(10); RTL_W32(RxMissed, 0);
@@ -1538,6 +1527,17 @@ rtl8169_hw_start(struct net_device *dev) /* Enable all known interrupts by setting the interrupt mask. */ RTL_W16(IntrMask, rtl8169_intr_mask); + tp->cp_cmd |= RTL_R16(CPlusCmd); + + if (tp->mac_version == RTL_GIGA_MAC_VER_D) { + dprintk(KERN_INFO PFX "Set MAC Reg C+CR Offset 0xE0. " + "Bit-3 and bit-14 MUST be 1\n"); + tp->cp_cmd |= (1 << 14) | PCIMulRW; + } + + RTL_W16(CPlusCmd, tp->cp_cmd); + RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb); + netif_start_queue(dev); }
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