Re: [PATCH v2 4/4] powerpc/perf: Add power12 Base Performance Monitoring support

On 2026-08-04 01:02:49 Tue, Amit Machhiwal wrote:

On 2026/08/03 09:27 PM, Mahesh Salgaonkar wrote:

quoted

From: Athira Rajeev <redacted>

Base enablement patch to register performance monitoring hardware
support for power12. Patch introduce the raw event encoding format,
defines the supported list of events, config fields for the event
attributes and their corresponding bit values which are exported via
sysfs.

Signed-off-by: Athira Rajeev <redacted>
Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com>
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com>
Tested-by: Praveen K Pandey <redacted>
---
Change in v2:
- Fix typo reported by Nikhil
---
 arch/powerpc/perf/Makefile              |   2 +-
 arch/powerpc/perf/core-book3s.c         |   2 +
 arch/powerpc/perf/internal.h            |   1 +
 arch/powerpc/perf/power12-events-list.h |  78 ++++
 arch/powerpc/perf/power12-pmu.c         | 466 ++++++++++++++++++++++++
 5 files changed, 548 insertions(+), 1 deletion(-)
 create mode 100644 arch/powerpc/perf/power12-events-list.h
 create mode 100644 arch/powerpc/perf/power12-pmu.c

diff --git a/arch/powerpc/perf/Makefile b/arch/powerpc/perf/Makefile
index 78dd7e25219ee..bcc804c413381 100644
--- a/arch/powerpc/perf/Makefile
+++ b/arch/powerpc/perf/Makefile

@@ -7,7 +7,7 @@ obj-$(CONFIG_PPC_PERF_CTRS)	+= core-book3s.o
 obj64-$(CONFIG_PPC_PERF_CTRS)	+= ppc970-pmu.o power5-pmu.o \
 				   power5+-pmu.o power6-pmu.o power7-pmu.o \
 				   isa207-common.o power8-pmu.o power9-pmu.o \
-				   generic-compat-pmu.o power10-pmu.o bhrb.o
+				   generic-compat-pmu.o power10-pmu.o bhrb.o power12-pmu.o

Minor: Line exceeds 80 columns (with tabs expanded). Please wrap
power12-pmu.o onto its own continuation line aligned with the entries
above it.

As I mentioned in my response to previous patch, 80 column is no more
hard limit.

Thanks,
-Mahesh.