Re: [PATCH v2 3/4] powerpc: Add Power12 architected mode

On 2026-08-04 00:47:49 Tue, Amit Machhiwal wrote:

On 2026/08/03 09:27 PM, Mahesh Salgaonkar wrote:

quoted

From: "Ritesh Harjani (IBM)" <ritesh.list@gmail.com>

PVR value of 0x0f000008 means we are arch v3.2 compliant (i.e.
Power12). This is used by phyp and kvm when booting as a pseries guest
to detect the presence of new Power12 features and to enable the
appropriate hwcap and facility bits.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Ritesh Harjani (IBM) <ritesh.list@gmail.com>
Signed-off-by: Mahesh Salgaonkar <mahesh@linux.ibm.com>
Tested-by: Praveen K Pandey <redacted>
Reviewed-by: Nikhil Kumar Singh <redacted>
---
 arch/powerpc/include/asm/prom.h           |  1 +
 arch/powerpc/include/uapi/asm/cputable.h  |  1 +
 arch/powerpc/kernel/cpu_specs_book3s_64.h | 14 ++++++++++++++
 arch/powerpc/kernel/prom_init.c           | 12 ++++++++++--
 4 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
index f4991d10d89ec..cd025c7225ee7 100644
--- a/arch/powerpc/include/asm/prom.h
+++ b/arch/powerpc/include/asm/prom.h

@@ -118,6 +118,7 @@ extern unsigned int boot_cpu_node_count;
 
 #define OV1_PPC_3_00		0x80	/* set if we support PowerPC 3.00 */
 #define OV1_PPC_3_1			0x40	/* set if we support PowerPC 3.1 */
+#define OV1_PPC_3_2			0x20	/* set if we support PowerPC 3.2 */

Minor: OV1_PPC_3_1 and OV1_PPC_3_2 use extra tabs relative to OV1_PPC_3_00.
This is pre-existing style inconsistency in the file (not introduced by
this patch) but new additions should match the surrounding code. Please
consider aligning them.

This is bit tricky. Prior to 3.0 the ISA versions were 2.05, 2.06, 2.07
and so on and pre-existing style did make sense. But it looks like from
3.1 the style changed may be for a reason because it can not be written
as 3.10 which may create more confusiton. Hence, I plan to stick with
the new style which is introduced from 3.1.

Thanks,
-Mahesh.